2006-2019 Microchip Technology Inc.
DS30009711C-page 3
I/O Ports with PPS
2.0
I/O PORT CONTROL REGISTERS
All I/O ports have four registers directly associated with the operation of the port, where ‘x’ is a
letter that denotes the particular I/O port:
• TRISx: PORTx Data Direction Control register
• PORTx: I/O Portx register
• LATx: PORTx Data Latch register
• ODCx: PORTx Open-Drain Control register
Each I/O pin on the device has an associated bit in the TRISx, PORTx, LATx and ODCx registers.
2.1
TRIS Registers
The TRISx register control bits determine whether each pin associated with the I/O port is an
input or an output. If the TRISx bit for an I/O pin is a ‘
1
’, then the pin is an input. If the TRISx bit
for an I/O pin is a ‘
0
’, then the pin is configured as an output. An easy way to remember this is
that a ‘
1
’ looks like an I (Input) and a ‘
0
’ looks like an O (Output). All port pins are defined as
inputs after a Reset.
2.2
PORT Registers
Data on an I/O pin are accessed via a PORTx register. A read of the PORTx register reads the
value of the I/O pin, while a write to the PORTx register writes the value to the port data latch.
This will also be reflected on the PORTx pins if the TRISx is configured as an output and the
multiplexed peripherals (if any) are disabled.
Many instructions, such as
BSET
and
BCLR
, are Read-Modify-Write (RMW) operations. There-
fore, a write to a port implies that the port pins are read, the value is modified and then written
back to the port data latch. Care should be taken when Read-Modify-Write instructions are used
on the PORTx registers when some I/O pins associated with the port are configured as inputs. If
an I/O pin configured as an input is changed to an output, at some later time, an unexpected
value may be output on the I/O pin. To avoid this, first write to the associated PORTx bit and then
change the direction of the pin as an output.
In addition, if Read-Modify-Write instructions are used on the PORTx registers while I/O pins are
configured as outputs, unintended I/O behavior may occur based on the device speed and I/O
capacitive loading.
illustrates unintended behavior that occurs if the user application
attempts to set I/O bits, 0 and 1 on PORTA, with two consecutive Read-Modify-Write instructions
in the PORTA register. At high CPU speeds and high-capacitive loading on the I/O pins, the
unintended result of the example code is that only I/O bit 1 is set high.
Note:
The total number of ports and available I/O pins will depend on the device variant.
In a given device, all of the bits in a PORT register may not be implemented. Refer
to the specific device data sheet for further details.
Note:
Set the pin as an output and drive to zero (TRISx =
1
, LATx =
1
) prior to making the
I/O pin an input (TRISx =
1
). This helps discharge the parasitic capacitance internal
to the I/O pin.