Figure 6-2. Debugger
rotatethispage90
GND
VCC_TARGET
100n
C201
32.768kHz
Kyocera Corporation
ST3215SB32768C0HPWBB
XC200
DNP
C203
10pF
DNP
13pF
C204
DNP
GND
GND
VCC_TARGET
100n
C202
VCC_TARGET
100n
C207
GND
32.768kHz
Kyocera Corporatio
n
S
T3215
S
B32768
C
0HP
W
B
B
X
C
20
0
DNP
NN
P
D
P
DDNPDNP
C
20
3
10p
F
NPNPNPN
DNDND
N
DNDN
13p
F
C
20
4
NPNPNPN
DNDNDNDNDN
G
N
D
G
N
D
32kHz Crystal
USER LED
VCC_TARGET
nRESET
GND
USER BUTTON
1k 1k
R202
YELLOW
LED
SML-D12Y1WT86
2
1
D200
TS604VM1-035CR
1
3
4
2
SW0
GND
VCC_EDGE
GND
GND
GND
GND
J203
J205
J201
J202
J204
J206
J209
BLM18PG471SN1
L200
SAMD21
2.2uF
C205
VCC_EDGE
GND
DBG0
CDC_UART
TX
RX
UART
CDC_TX
CDC_RX
DBG2
DBG1
DBG3
DBG2
DEBUGGER CONNECTIONS
DBG1
DBG3
D
BG
0
C
DC
_
UART
_
T
X
RX
U
ART
D
BG1
D
BG
3
D
BG
2
DBG0
VOFF
ID_SYS
ID_SYS
VOFF
2.
2uF
C
20
5
V
CC_EDGE
G
N
D
TARGET BULK
PROG/DEBUG Pull
47k47k
R204
47k47k
R205
DBG0
DBG1
100k
R200
VCC_TARGET
100
k
R20
0
V
CC_TARGET
nRESET Pull
VBUS
PA10_UART2_TX
PA09_UART0_RX
PA11_UART2_RX
PA08_UART0_TX
PA13_I2C4_SCL
PA12_I2C4_SDA
PA17_SPI_SCK
PA16_SPI_MOSI
PA14
PA15
PA00_XIN32
PA01_XOUT32
PA23
PA24
PA25
PA30_S
WCLK
PA18_SPI_SS
PA19_SPI_MISO
PA07_ADC7
PA06_ADC6
PA05_ADC5
PA04_PWM4
PB09_PWM3
PB08_ADC2
PA03_ADC1
PA02_ADC0
PA21_UART3_RX
PA20_UART3_TX
PB23
PA27
PA28
PB10_L
ED
PB11_B
UTTON
PA31_S
WDIO
GND
VCC_TARGET
100n
C206
1u
C208
GND
(Target Device)
1.8k
R206
DNP
1.8k
R207
DNP
VCC_TARGET
VCC_TARGET
PA00_X
IN32
PA01_XOUT32
PB10_LED
PB11_B
UTTON
PA30_SWCLK
PB11_BUTTON
PA31_SWDIO
nRESET
PA08_UART0_TX
PA09_UART0_RX
PA12_I2C4_SDA
PA13_I2C4_SCL
PA16_SPI_MOSI
PA19_SPI_MISO
PA17_SPI_SCK
PA18_SPI_SS
PA02_ADC0
PA03_ADC1
PB08_ADC2
PB09_PWM3
PA04_PWM4
PA05_ADC5
PA06_ADC6
PA07_ADC7
PA20_UART3_TX
PA21_UART3_RX
PA00_XIN32
PA01_XOUT32
PA14
PA15
PA24
PA25
PA23
PB23
PA27
PA28
PA10_UART2_TX
PA11_UART2_RX
PA12_I2C4_SDA
PA13_I2C4_SCL
110R
R203
CDC RX
3
CDC TX
4
DBG1
5
DBG2
6
0 T
X
7
1 R
X
8
2 S
D
A
9
3 S
C
L
10
4 M
OSI
11
5 MI
SO
12
6 S
C
K
13
7 S
S
14
GND
15
0 (
T
X
)
16
1 (RX)
17
2
18
3
19
0
20
GND
24
DBG3
46
DBG0
45
GND
44
VCC
43
PWM 3
38
ADC 2
37
ADC 1
36
ADC 0
35
GND
34
4
30
4
26
GND
25
ADC 7
42
ADC 6
41
ADC 5
40
PWM 4
39
DEBUGGER
TARGET
ID
2
VOFF
47
1
21
2
22
3
23
5
27
6
28
7
29
5
31
6
32
7
33
RESERVED
1
VBUS
48
CNANO48-pin edge connector
J200
PA00
1
PA01
2
PA02
3
PA03
4
GNDANA
5
VDDANA
6
PB08
7
PB09
8
PA04
9
PA05
10
PA06
11
PA07
12
PA08
13
PA09
14
PA10
15
PA11
16
VDDIO
17
GND
18
PB10
19
PB11
20
PA12
21
PA13
22
PA14
23
PA15
24
PA16
25
PA17
26
PA18
27
PA19
28
PA20
29
PA21
30
PA22
31
USB_SOF/PA23
32
USB_DM/PA24
33
USB_DP/PA25
34
GND
35
VDDIO
36
PB22
37
PB23
38
PA27
39
RESET
N
40
PA28
41
GND
42
VDDCO
RE
43
VDDI
N
44
SWDCLK/PA
30
45
SWDIO/PA
31
46
PB02
47
PB03
48
SAMD21G17D-AUT
U200
PA22_CDC5_TX
PB22_CDC5_RX
PB03
PB02
PA22_CDC5_TX
PB22_C
DC5_RX
PB03
PB02
Crystal datasheet:
Ccrystal = 7pF
max ESR = 70kOhm
Accuracy
±
20ppm
SAMD21 datasheet:
Cxin = 5.5pF
Cxout = 5.5pF
Cl
≈
1/( (1/5.5pF)+ (1/5.5pF) )
≈
2.75pF
Maximum Load = 12.5pF
Maximum ESR = 80kOhm
Estimated Cpcb = 0.5pF
Estimated load
C = 2 (Ccrystal- Cpara - Cpcb)
C = 2 (7pF - 2.75pF - 0.5pF)
C = 7.5pF
Selected in design after verification
C= 10/13pF
N
OTE on UART/CDC:
RX/TX on the header denotes the
input/output direction of the signal
respective to it's source.
CDC TX is output from the DEBUGGER.
CDC RX is input to the DEBUGGER.
TX is output from the TARGET device.
RX is input to the TARGET device.
N
OTE on CDC:
TX and RX cross here.
SAM D21
Schematics
©
2020 Microchip Technology Inc.
User Guide
DS70005409C-page 18
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