Microchip Technology ATmega328P Xplained Mini, Manual

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4.3 Target Headers and Connectors
4.3.1 Target Digital I/O
The J200 and J201 headers provide access to the ATmega328P digital I/O pins.
Table 4-1. J200 Digital I/O High Byte Header
J200 Pin ATmega328P Pin Function
1 PB0
2 PB1
3 PB2 SS, SPI Bus Master Slave select
4 PB3 MOSI, SPI Bus Master Output/Slave Input
5 PB4 MISO, SPI Bus Master Input/Slave Output
6 PB5 SCK, SPI Bus Master Clock Input
7 GND
8 AREF
9 PC4 SDA, 2-wire Serial Bus Data Input/Output Line. Shared with ADC4.
10 PC5 SCL, 2-wire Serial Bus Clock Line. Shared with ADC5.
Table 4-2. J201 Digital I/O High Low Header
J201 Pin ATmega328P Pin Function
1 PD0 RXD (ATmega328P USART Input Pin)
2 PD1 TXD (ATmega328P USART Output Pin)
3 PD2
4 PD3
5 PD4
6 PD5
7 PD6
8 PD7
4.3.2 Board Power Header
The J202 header enables connection to the ATmega328P Xplained Mini power system.
Table 4-3. J202 Power Header
J202 Pin Signal Description
1 NC
2 VCC_TARGET The power source selected for the target (selected by J301)
3 RESET_SENSE This is a RESET signal monitored by the mEDBG. If pulled low, the target
RESET line will be pulled low by the mEDBG. The ATmega32U4 internal pull-up
is enabled. This signal is not available during debugging.
4 VCC_P3V3 The 3.3V regulator output
ATmega328P Xplained Mini
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2020 Microchip Technology Inc.
User Guide
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