Micrel MICRF506 Manual Download Page 30

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Micrel

MICRF506BML/YML

Typical Application

ANT

RFVDD

SCLK

DATAIXO

DATACLK

RSSI

50ohm line

MLF32

MICRF506

RFGND

PTATBIAS

RFVDD

RFGND

ANT

RFGND

GND

ICHO

CHO

RSSI

XTALOUT

XTALIN

SCLK

DATAlXO

DATACLK

VCO

OGN

VARI

CP_

IGGN

V2P5_2

C9
1.5pF

1.5pF

1nF

TSX 10A, 16MHz

18pF

15pF

12nH

100nF

10nF

V2P5_1

V2P5_2

V2P5_3

V2P5_0

R3 27k

82k

33k

6k2

V2P5_2

C10

1nF

C11

10nF

V2P5_3

V2P5_0

C12

1nF

C13

1nF

10R

V2P5_1

TP1

TP2

C3
nc

V2P5_2

47pF

MICRF506 – MLF32

Item Part Value

Description

Manufacturer

Part

Numner

10nF

10nF X7R ±10% 0603 50V

Kyocera

CM105X7R103K50A

100nF

100nF X7R ±10% 0603 16V

Kyocera

CM105X7R104K16A

3 C3

18pF

18pF COG ±5% 0603 50V

Kyocera

CM105CG180J50A

47pF

47pF COG ±5% 0603 50V

Kyocera

CM105CG470J50A

15pF

15pF COG ±5% 0603 50V

Kyocera

CM105CG150J50A

7 C7

1nF

Optional

Kyocera

CM105X7R102K50A

1.5pF

1.5pF COG ±0.25pF 0603 50V

Kyocera

CM105CG1R5C50A

1.5pF

1.5pF COG ±0.25pF 0603 50V

Kyocera

CM105CG1R5C50A

C10

1nF

1nF X7R ±10% 0603 50V

Kyocera

CM105X7R102K50A

C11

10nF

10nF X7R ±10% 0603 50V

Kyocera

CM105X7R103K50A

C12

1nF

1nF X7R ±10% 0603 50V

Kyocera

CM105X7R102K50A

C13

1nF

1nF X7R ±10% 0603 50V

Kyocera

CM105X7R102K50A

6.2k

6.2k ±1% 0603 50V

Kyocera

CR10-6201F

15 R2 0

Ω

±1% 0603 50V

Kyocera CJ10-000

27k

27k ±1% 0603 50V

Kyocera

CR10-2702F

82k

82k ±1% 0603 50V

Kyocera

CR10-8202F

18 R6 33k

Optional

Kyocera

CR10-3302F

19 R7 10

Ω

10R ±1% 0603 50V

Kyocera

CR10-10R0F

12nH

12nH ±5% 0603

Coilcraft

0603CS-12NXJB

16MHz

16MHz, 9pF, 10/10ppm

Toyocom

TN4-26011

July 2006

M9999-092904

+1 408-944-0800

Summary of Contents for MICRF506

Page 1: ...e Each channel includes a pre amplifier a third order Sallen Key RC low pass filter that protects the following switched capacitor filter from strong adjacent channel signals and a limiter The main ch...

Page 2: ...iting to n Registers having Incremental Addresses 11 Writing to n Registers having Non Incremental Addresses 12 Reading from the control registers in MICRF506 12 Programming interface timing 12 Power...

Page 3: ...programming bit 35 Table 1 Detailed description of programming bit 35 Table 2 Main Mode bit 40 Table 3 Synchronizer mode bit 40 Table 4 Modulation bit 40 Table 5 Prefilter bit 40 Table 6 Power amplifi...

Page 4: ...NA 2 0 3 6V 18mA FSK ASK MLF 24 Ordering Information Part Number Junction Temp Range 1 Package MICRF506YML TR 40 to 85 C Lead free 32 Pin MLF TM MICRF506BML TR 40 to 85 C 32 Pin MLF TM ______________...

Page 5: ...connect 9 CIBIAS O Connection for bias resistor 10 IFVDD IF mixer power supply 11 IFGND IF mixer ground 12 ICHOUT O Test pin 13 QCHOUT O Test pin 14 RSSI O Received signal strength indicator 15 LD O P...

Page 6: ...A Standby Current 280 A VCO and PLL Section Reference Frequency 4 40 MHz 433 75MHz to 434 25MHz 0 7 1 3 ms PLL Lock Time 5 3kHz bandwidth 430MHz to 440MHz 1 3 2 ms PLL Lock Time 5 20kHz bandwidth 433...

Page 7: ...BER 10 3 106 dBm 38 4kbps 4 BER 10 3 104 dBm 76 8kbps 2 BER 10 3 101 dBm 125kbps 2 BER 10 3 100 dBm Receiver Sensitivity 200kbps 2 BER 10 3 97 dBm 125kbps 125kHz deviation 12 dBm Receiver Maximum Inpu...

Page 8: ...t High 0 7VDD VDD V VIL Logic Input Low 0 0 3VDD V Clock Data Frequency 5 10 MHz Clock Data Duty Cycle 5 45 55 Notes 1 Exceeding the absolute maximum rating may damage the device 2 The device is not g...

Page 9: ...ried out at a rate determined by the user The MICRF506 will ignore transitions on the SCLK line if the CS line is inactive The MICRF506 can be put on a bus sharing clock and data lines with other devi...

Page 10: ...ess and R W bit and Values into the MICRF506 MICRF506 will sample the IO line at negative edges of SCLK Make sure to change the state of the IO line before the negative edge Refer to figures below Bri...

Page 11: ...isters having incremental addresses Writing to n Registers having Incremental Addresses In addition to entering all bytes it is also possible to enter a set of n bytes starting from address i A6 A5 A0...

Page 12: ...st address to read from can be any valid address 0 22 Reading is not destructive i e values are not changed The IO line is output from the MICRF506 input to user for a part of the read sequence Refer...

Page 13: ...dge of SCLK to valid IO during a read operation assuming load capacitance of IO is 25pF 75 ns July 2006 13 M9999 092904 1 408 944 0800 Table 6 Timing Specification for the 3 wire Programming Interface...

Page 14: ...long 1 for read 0 for write Address and R W bit together make 1 octet All control registers are 8 bits long Enter read msb in every octet first Always write 8 bits to read 8 bits from a control regist...

Page 15: ...gement of a PLL based frequency synthesizer The MICRF506 has a dual modulus prescaler for increased frequency resolution In a dual modulus prescaler the main divider is split into two parts the main p...

Page 16: ...en the crystal terminals should be equal to CL for the crystal to oscillate at the specified frequency CL 1 1 C10 1 C11 Cparasitic The parasitic capacitance is the pin input capacitance and PCB stray...

Page 17: ...3 436MHz 1 0 0 1 0 436 450MHz 0 1 1 1 1 Table 8 VCO Bit Setting The bias bit will optimize the phase noise and the frequency bit will control a capacitor bank in the VCO The tuning range the RF freque...

Page 18: ...his is not suppressed as much as when doing modulation on the VCO with a lower bandwidth filter A schematic for a second R2 0 and C3 NC and third order loop filter is shown in Figure 8 C3 C1 Pin 27 CP...

Page 19: ...k requency of 20kHz fXCO Crystal oscillator frequency Refclk_K 6 bit divider values between 1 and 63 BitRate_clkS Bit rate setting values between 0 and 6 Data Interface The MICRF506 interface can be d...

Page 20: ...is important in order to prevent mixer noise from dominating the overall front end noise performance The LNA is a two stage amplifier and has a nominal gain of approximately 23dB at 434MHz The front...

Page 21: ...bit divider divides the input frequency by 4 the cut off frequency of the SC filter is 16MHz 40 x 4 100kHz 1st order RC low pass filters are connected to the output of the SC filter to filter the clo...

Page 22: ...ing UP pulses 1 0 Counting DN pulses 1 1 Counting UP and DN pulses UP increments the counter DN decrements it FEEC_3 FEEC_2 No of symbols used for the measurement 0 0 8 0 1 16 1 0 32 1 1 65 Table 10 F...

Page 23: ...lock which needs to be programmed according to the bit rate The clock frequency should be 16 times the actual bit rate a bit rate of 20 kbit sec needs a bit synchronizer clock with frequency of 320 kH...

Page 24: ...esigned for the 434MHz band with 50Ohm terminations The component values may have to be tuned to compensate for the layout parasitics This filter may also increase the receiver selectivity Frequency M...

Page 25: ...Frequency synthesizer The divider values stored in the M0 N0 and A0 registers will be used when transmitting a 0 and the M1 N1 and A1 registers will be used to transmit a 1 The difference between the...

Page 26: ...2 Refclk_K f f Mod_clkS where fMOD_CLK is the modulator clock shown in Figure 19 fXCO is the crystal oscillator frequency Refclk_K is a 6 bit number and Mod_clkS is a 3 bit number Mod_clkS can be set...

Page 27: ...ency components in the generated waveform a filter with programmable cut off frequency can be enabled This is done using Mod_F2 Mod_F0 the least one being LSB The Mod_F should be set according to the...

Page 28: ...affect the tuning range With a 16 0 MHz crystal TN4 26011 from Toyocom and external capacitor values of 1 5 pF the tuning range will be approximately symmetrical around the center frequency A XCO_tune...

Page 29: ...alue giving the lowest IFEEI Local variables XCO_Present 5 bit holds present value in XCO_tune bits XCO_Step 4 bit holds increment decrement of XCO_tune bits SCO_Sign 1 bit holds POS or NEG increment...

Page 30: ...00nF 100nF X7R 10 0603 16V Kyocera CM105X7R104K16A 3 C3 NC 4 C4 18pF 18pF COG 5 0603 50V Kyocera CM105CG180J50A 5 C5 47pF 47pF COG 5 0603 50V Kyocera CM105CG470J50A 6 C6 15pF 15pF COG 5 0603 50V Kyoce...

Page 31: ...ed minimum number of via s are 9 and they should be directly connected to ground plane providing the best RF ground and thermal performance For best yield plugged or open via s should be used D2 Y e X...

Page 32: ...up Ex A trace width of 75 mil 1 9 mm gives 50 impedance on a FR4 board dielectric cons 4 4 with copper thickness of 35 m and height layer 1 layer 2 spacing of 1 00 mm RF circuitry is sensitive to vol...

Page 33: ...Micrel MICRF506BML YML Package Information MICRF506BML MICRF505BML 32 Pin MLF B July 2006 33 M9999 092904 1 408 944 0800...

Page 34: ...nformation MICRF506YML CPL D2 E2 e L D E H h H2 b Bottom view Top view Side view D D2 E E2 e b L CPL H h H2 Units 5 0 3 10 0 10 5 0 3 10 0 10 0 5 0 25 0 4 0 05 0 20 0 85 0 05 0 00 0 05 0 2 mm July 200...

Page 35: ...0_5 N0_4 N0_3 N0_2 N0_1 N0_0 0001101 M0_11 M0_10 M0_9 M0_8 0001110 M0_7 M0_6 M0_5 M0_4 M0_3 M0_2 M0_1 M0_0 0001111 A1_5 A1_4 A1_3 A1_2 A1_1 A1_0 0010000 N1_11 N1_10 N1_9 N1_8 0010001 N1_7 N1_6 N1_5 N1...

Page 36: ...SB 3 Mod_I3 Modulator current setting 2 Mod_I2 Modulator current setting 1 Mod_I1 Modulator current setting 0 Mod_I0 Modulator current setting LSB 0000101 7 Reserved not in use 6 Reserved not in use 5...

Page 37: ...bit 4 A0_4 A0 counter 5 bit 3 A0_3 A0 counter 4 bit 2 A0_2 A0 counter 3 bit 1 A0_1 A0 counter 2 bit 0 A0_0 A0 counter 1 bit 0001011 7 Reserved not in use 6 Reserved not in use 5 Reserved not in use 4...

Page 38: ...M1 counter 10 bit 0 M1_8 M1 counter 9 bit 0010011 7 M1_7 M1 counter 8 bit 6 M1_6 M1 counter 7 bit 5 M1_5 M1 counter 6 bit 4 M1_4 M1 counter 5 bit 3 M1_3 M1 counter 4 bit 2 M1_2 M1 counter 3 bit 1 M1_...

Page 39: ...M9999 092904 1 408 944 0800 0010110 7 FEE_7 FEE value bit 7 MSB 6 FEE_6 FEE value bit 6 5 FEE_5 FEE value bit 5 4 FEE_4 FEE value bit 4 3 FEE_3 FEE value bit 3 2 FEE_2 FEE value bit 2 1 FEE_1 FEE valu...

Page 40: ...n off Transparent transmission of data 1 Rx Bit synchronization on Bit clock is generated by transceiver 1 Tx DataClk pin on Bit clock is generated by transceiver Table 4 Modulation bit Modulation1 Mo...

Page 41: ...K 0 0 1 F 32K 0 1 0 F 16K 0 1 1 F 8K 1 0 0 F 4K 1 0 1 F 2K 1 1 0 F K 1 1 1 F Can not be used as BitRate_clk Table 8 Test signals OutS3 OutS2 OutS1 OutS0 IchOut QchOut Ichout2 RSSI QchOut2 NC 0 0 0 0 G...

Page 42: ...measurement 0 0 8 0 1 16 1 0 32 1 1 64 July 2006 42 M9999 092904 1 408 944 0800 MICREL INC 2180 FORTUNE DRIVE SAN JOSE CA 95131 USA TEL 1 408 944 0800 FAX 1 408 474 1000 WEB http www micrel com The in...

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