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7I47S 9

OPERATION

ANALOG OUT

The 7I47S provides one analog output for spindle control. The analog output is a

isolated  potentiometer  replacement  type  device.  It  functions  like  a  potentiometer  with
ANALOG  +  being  one  end  of  the  potentiometer,  ANALOG  OUT  being  the  wiper  and
ANALOG- being the other end. The voltage on ANALOG out can be set to any voltage
between ANALOG- and . Polarity and voltage range must always be observed
for proper operation. The voltage supplied between  and ANALOG- must be
between 5VDC an 15VDC with  always being more positive than ANALOG-.
The  analog  output  voltage  is  set  by  PWM  from  the  controller.  The  optimum  PWM
frequency is approximately 5KHz, Higher frequencies will have lower ripple but more non-
linearity, lower frequencies will have better linearity but more ripple.

A 50% duty cycle PWM signal  will  result in a 50 % voltage output. The voltage

output is gated by the ENABLE interface signal, and forced to = ANALOG- when enable
is not asserted (enable is active low at the FPGA interface level).

Because the analog output is isolated, bipolar output is possible, for example with

 connected to 5V and ANALOG- connected to -5V, a +=5V analog output range
is created. In this case the PWM output must be offset so that 50% PWM is generated
when a 0V output is required. Note that id bipolar output is used, the output will be forced
to ANALOG- at startup or when ENABLE is false. 

ISOLATED OUTPUTS

The 7I47S provides 3 isolated outputs for use for spindle direction control, spindle

enable or other applications. These outputs are OPTO coupler Darlington transistors. They
are all isolated from one another so can be used for pull up or  pull-down individually. They
will switch a maximum of 50 mA at 0 to 100 VDC. The ENABLE output is special as it uses
the same signal that enables the analog output. When the analog output is enabled, the
ENABLE OPTO output is on. The DIR and AUX outputs have no special functions so may
be used for any purpose.

  

Summary of Contents for 7I47S

Page 1: ...7I47S MANUAL 8 12 channel motion oriented differential interface with analog out V1 1...

Page 2: ...This page intentionally almost blank...

Page 3: ...ERMINATION ENABLE 2 CONNECTORS 3 CONNECTOR LOCATIONS AND DEFAULT JUMPERS 3 CONTROLLER CONNECTOR 4 RS 422 CONNECTORS 5 AUX 5V POWER 5 OPERATION 5V POWER 7 RS 422 OUTPUT DRIVE 7 INPUT OUTPUT POLARITY 7...

Page 4: ...ed for spindle speed control The 7I47S is mainly intended for motion oriented applications for example as an output buffer and line receiver for connecting step and direction drives and encoders to An...

Page 5: ...W9 RX3 LEFT TERM W10 RX8 LEFT TERM W11 RX2 LEFT TERM W12 RX7 LEFT TERM W13 RX1 LEFT TERM W14 RX6 LEFT TERM W15 RX0 LEFT TERM TERMINATION ENABLE The 7I47S can terminate its RS 422 inputs if desired Te...

Page 6: ...7I47S 3 CONNECTORS CONNECTOR LOCATIONS AND DEFAULT JUMPER POSITIONS...

Page 7: ...RX0 FROM 7I47S 33 AUX TO 7I47S 11 RX6 FROM 7I47S 35 DIR TO 7I47S 13 RX1 FROM 7I47S 37 ENA TO 7I47S 15 RX7 FROM 7I47S 39 PWM TO 7I47S 17 RX2 FROM 7I47S 41 TX0 TO 7I47S 19 RX8 FROM 7I47S 43 TX1 TO 7I47S...

Page 8: ...7S 5 RX1 TO 7I47S 6 5V FROM 7I47S 7 RX2 TO 7I47S 8 RX2 TO 7I47S 9 RX3 TO 7I47S 10 RX3 TO 7I47S 11 GND FROM 7I47S 12 RX4 TO 7I47S 13 RX4 TO 7I47S 14 5V FROM 7I47S 15 RX5 TO 7I47S 16 RX5 TO 7I47S 17 5V...

Page 9: ...5 RX7 TO 7I47S 6 5V FROM 7I47S 7 RX8 TO 7I47S 8 RX8 TO 7I47S 9 RX9 TO 7I47S 10 RX9 TO 7I47S 11 GND FROM 7I47S 12 RX10 TO 7I47S 13 RX10 TO 7I47S 14 5V FROM 7I47S 15 RX11 TO 7I47S 16 RX11 TO 7I47S 17 5...

Page 10: ...FROM 7I47S RS 422 9 GND FROM 7I47S RS 422 10 TX7 FROM 7I47S RS 422 11 TX7 FROM 7I47S RS 422 12 GND FROM 7I47S RS 422 13 NC FROM 7I47S 14 NC FROM 7I47S 15 AUX FROM 7I47S OPTO OUTPUT 16 AUX FROM 7I47S...

Page 11: ...in 0 to 70C ambients RS 422 OUTPUT DRIVE The 7I47Ss outputs are designed to drive singly terminated RS 422 lines or remote opto isolator diodes Maximum output drive is 35 mA The 7I47S outputs can be u...

Page 12: ...output is gated by the ENABLE interface signal and forced to ANALOG when enable is not asserted enable is active low at the FPGA interface level Because the analog output is isolated bipolar output i...

Page 13: ...ION RESISTOR 131 135 Ohm RS 422 OUTPUT LOW 24 mA sink C 8 Volts RS 422 OUTPUT HIGH 24 mA source VCC 8 C Volts ANALOG REFERENCE VOLTAGE 5 15 Volts ANALOG ANALOG ANALOG SUPPLY CURRENT C 20 mA ANALOG ISO...

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