background image

LGR-5320 Series User's Guide 

Functional Details 

25 

 

Figure 20. Debounce block diagram 

Edge selection is available with or without debounce. In this case, the debounce time setting is ignored and the 
input signal goes straight from the inverter or inverter bypass to the counter module. 

The two debounce modes are 

trigger after stable

 and 

trigger before stable

. In either mode, the selected 

debounce time determines how fast the signal can change and still be recognized. 

Trigger after stable mode

—In the 

trigger after stable

 mode, the output of the debounce module does not 

change state until a period of stability has been achieved. This means that the input has an edge, and then must 
be stable for a period of time equal to the debounce time. Refer to Figure 21. 

 

Figure 21. 

Trigger after stable

 mode 

T1 through T5 indicate time periods. In 

trigger after stable

 mode, in order for that edge to be accepted (passed 

through to the counter module), the input signal to the debounce module is required to have a period of stability 
after an incoming edge. For this example, the debounce time is equal to T2 and T5. 

 

T1—In Figure 21, the input signal goes high at the beginning of time period T1, but never stays high for a 
period of time equal to the debounce time setting (equal to T2 for this example.) 

 

T2—At the end of time period T2, the input signal has transitioned high and stayed there for the required 
amount of time—therefore the output transitions high. If the input signal does not stabilize in the high state 
long enough, no transition would have appeared on the output, and the entire disturbance on the input 
would have been rejected. 

 

T3—During time period T3, the input signal remained steady. No change in output is seen. 

 

T4—During time period T4, the input signal has more disturbances and does not stabilize in any state long 
enough. No change in the output is seen. 

 

T5—At the end of time period T5, the input signal has transitioned low and stayed there for the required 
amount of time—therefore the output goes low. 

 

 

Screw terminals

 

Buffer

 

Inverter

 

Inverter Bypass

 

Debounce Bypass

 

Trigger Before Stable

 

Trigger After Stable

 

IN

 

OUT

 

IN

 

OUT

 

To

 

Counters

 

Summary of Contents for LGR-5320 Series

Page 1: ...LGR 5320 Series Stand Alone High Speed Analog and Digital I O Data Loggers Document Revision 2 October 2013 Copyright 2013 User s Guide...

Page 2: ...it These warranties are in lieu of all other warranties expressed or implied including any implied warranty of merchantability or fitness for a particular application The remedies provided herein are...

Page 3: ...a device in USB mode 10 Setting up a device in Logging mode 10 Replacing the internal 3 V lithium cell battery 10 Chapter 3 Functional Details 12 External components 12 Function buttons and LEDs top o...

Page 4: ...er s Guide 4 Chassis ground 36 USB specifications 36 Environmental 37 Mechanical 37 Screw terminal connector type 37 LGR 5325 screw terminal pinout 38 LGR 5327 5329 screw terminal pinout 40 Declaratio...

Page 5: ...and others damaging your hardware or losing your data bold text Bold text is used for the names of objects on a screen such as buttons text boxes and check boxes italic text Italic text is used for th...

Page 6: ...500 V of isolation between the digital inputs and the host computer analog inputs and counter inputs The LGR 5325 and LGR 5327 provide 16 digital input connections including TTL thresholds with 28 V t...

Page 7: ...diagram SD Connector USB Connector FLASH FPGA Coin battery Digital Inputs x16 Relay Output Counter Inputs x4 Quadrature counters included on LGR 5327 5329 Digital Trigger Input Analog Trigger Input Sa...

Page 8: ...20 Series shipment This booklet provides instructions about installing the software and logging data Unpacking As with any electronic device take care while handling to avoid damage from static electr...

Page 9: ...n all buttons on the logger are enabled and the device can read from or write to an installed SD card Use this mode to load configuration settings and log data using LGR 5320 Series logger features LG...

Page 10: ...r Setting up a device in USB mode above or connect the PWR terminal to the positive lead of your power source and the PWR terminal to the negative lead of the power source Use a power source that meet...

Page 11: ...artment on the board Figure 3 Location of battery compartment 5 Lift the clip and insert the new battery in the battery compartment Make sure the positive side of the battery is facing up and away fro...

Page 12: ...ttons and LEDs top of case Each function button on the top of a LGR 5320 Series device case is explained below All buttons and LEDs are disabled when a LGR 5320 Series device is connected to a USB por...

Page 13: ...7L LEDs both blink representing binary code 0001 All SD STAT errors and corresponding analog input LED blink codes are explained below LGR 5320 Series error descriptions and codes Error Blink code bin...

Page 14: ...lot and the device is disconnected from a USB port When a device is logging data pressing this button stops the data logging SAVE button Saves the current logging configuration to a file on the SD car...

Page 15: ...s see Figure 8 Figure 8 LGR 5327 and LGR 5329 counter channel input terminals and input mode switches To configure a counter channel for single ended mode slide the switch to the right Note that the d...

Page 16: ...f the differential inputs to AGND A value of approximately 100 k can be used for most applications On the LGR 5325 the AGND and GND terminals are tied together internally These grounds are electricall...

Page 17: ...he trigger level or threshold but only after the input level has been below the hysteresis range If the level briefly drops just below the threshold perhaps due to noise and then rises above it again...

Page 18: ...is complete These trigger types are used to trigger scans when two or more signals have already become valid With the LGR 5327 and LGR 5329 you can use a combination of instantaneous and latched trigg...

Page 19: ...annels With OR multichannel triggering the LGR 5327 and LGR 5329 triggers a scan when the signal first rises above the threshold If the device is ready and the condition is met the scan is triggered W...

Page 20: ...h triggering the device could trigger the acquisition when channel 3 is below 0 9 V after channel 2 has gone above 1 3 V Figure 15 Below level initialization latched duration Rising edge trigger This...

Page 21: ...trol system Two settings control this trigger operation the condition and the mask The polarity setting allows the following choices Rising edge high level equal to Triggers when there is an exact pat...

Page 22: ...A input Some modes also make use of the Phase B and Index inputs The counter signal names on the LGR 5325 are CTRx UPDNx and GATEx Each mode supports additional sub modes for counter operations Refer...

Page 23: ...0 and then stop Counting resumes if direction reverses or the counter is cleared Non recycle The counter is disabled if a count overflow or underflow occurs or the modulo number is reached A clear com...

Page 24: ...riods 16 bit or 32 bit values Four resolutions are available to 20 ns 200 ns 2 s or 20 s All period measurement mode options are software selectable LGR 5320 Series devices use the 50 MHz system clock...

Page 25: ...odule is required to have a period of stability after an incoming edge For this example the debounce time is equal to T2 and T5 T1 In Figure 21 the input signal goes high at the beginning of time peri...

Page 26: ...n by going low T5 During time period T5 the input signal again has disturbances that cause the input to not meet the debounce time requirement The output does not change state T6 After time period T6...

Page 27: ...itional debounce function rejecting glitches and only passing state transitions after a required period of stability Use Trigger after stable with electromechanical devices like encoders and mechanica...

Page 28: ...LGR 5320 Series User s Guide Functional Details 28 Mechanical drawings Figure 26 Circuit board dimensions Figure 27 Housing dimensions...

Page 29: ...0 V 5 V 1 V range 10 G power on 1 G power off Input leakage current 100 pA Input capacitance 30 V range LGR 5327 5329 90 pf Note 2 10 V 5 V 1 V range 55 pf Maximum working voltage signal common mode 3...

Page 30: ...d from the EGND earth ground pin The LGR 5327 AGND GND and ENC pins are tied together internally These grounds are electrically isolated from the EGND earth ground pin The LGR 5329 AGND GND and ENC pi...

Page 31: ...GR 5325 10 s fixed analog inputs LGR 5327 5329 5 s fixed analog inputs All specified digital channels counters digital inputs are sampled simultaneously at the beginning of the pacer interval Triggeri...

Page 32: ...bandwidth 3 dB 1 MHz Digital input Table 7 Digital Input specifications Parameter Specification Number of inputs 16 channels Input voltage range LGR 5325 5327 0 V to 28 V LGR 5329 0 V to 30 V Input t...

Page 33: ...g current 2 0 A Fault tolerance Table 9 Fault condition behavior Condition Behavior Power loss Volatile memory data loss internal memory Data loss if data being written to non volatile storage MCC can...

Page 34: ...9 K pull down resistor Maximum input voltage range 0 5 V to 7 0 V Input high voltage 2 0 V Input low voltage 0 8 V LGR 5327 5329 only Receiver type Quad DIFF receiver Configuration Each channel consi...

Page 35: ...s SD card device error condition if blinking LOG indicator Indicates acquisition in progress TRIG indicator Indicates trigger occurred EVENT indicator Flashes when an event is logged or configuration...

Page 36: ...wer real time clock when device is powered off Note 7 The LGR 5325 AGND and GND pins are tied together internally These grounds are electrically isolated from the EGND earth ground pin The LGR 5327 AG...

Page 37: ...fication Dimensions 9 5 L x 5 0 W x 1 75 H Weight 505 85 g 1 12 lbs Mechanical shock operating 50 g 3 ms half sine 30 g 11 ms half sine Three hits per face for a total of 18 hits 18 hits at 50 g 18 hi...

Page 38: ...round 21 RSVD Reserved 76 DTRIG Digital trigger 22 GATE0 Gate 0 input 75 PACER Pacer I O 23 RSVD Reserved 74 PWR Input ground 24 GND Digital ground 73 PWR Input power 25 RSVD Reserved 72 NC Relay norm...

Page 39: ...rigger 22 GATE0 Gate 0 input 75 PACER Pacer I O 23 RSVD Reserved 74 PWR Input ground 24 GND Digital ground 73 PWR Input power 25 RSVD Reserved 72 NC Relay normally closed contact 26 CTR1 Counter 1 inp...

Page 40: ...ER Pacer I O 23 0IDX INDEX0 input 74 PWR Input ground 24 ENC Encoder ground 73 PWR Input power 25 ENC Encoder power output 72 NC Relay normally closed contact 26 1PHA PHASE1A input 71 COM Relay common...

Page 41: ...nput ground 24 ENC Encoder ground 73 PWR Input power 25 ENC Encoder power output 72 NC Relay normally closed contact 26 1PHA PHASE1A input 71 COM Relay common contact 27 1PHA PHASE1A input 70 NO Relay...

Page 42: ...5 2001 Surge Immunity IEC 61000 4 6 2003 Radio Frequency Common Mode Immunity IEC 61000 4 11 2004 Voltage Interrupts To maintain compliance to the standards of this declaration the following condition...

Page 43: ...Measurement Computing Corporation 10 Commerce Way Suite 1008 Norton Massachusetts 02766 508 946 5100 Fax 508 946 9500 E mail info mccdaq com www mccdaq com...

Reviews: