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XR77103-A1R0 Universal PMIC 3 Output Buck Regulator EVB User Manual
Evaluation Board Overview
March 10, 2022
010-A1R0UMR00
4
Evaluation Board Overview
The XR77103-A1R0 EVB block diagram is shown in
.
Figure 3:
Simplified Block Diagram, XR77103-A1R0 EVB
I/O and Test Points
VIN, LX and PGOOD Test Points
Test points are available for VIN (TP8), the LX switching nodes (TP6 for LX1, TP7 for LX2, and TP1 for LX3), the
compensation pins (TP4 for COMP1, TP5 for COMP2, TP3 for COMP3), and PGOOD (TP2) for monitoring.
The PGOOD output can be used externally. For more information about PGOOD options, see
Table 3:
Test Points
Test Point
Function
TP1
LX3
TP2
PGOOD
TP3
COMP3
TP4
COMP1
TP5
COMP2
TP6
LX1
TP7
LX7
TP8
VIN
XR77103-A1R0
V
IN
V
OUT1
EN
PGOOD
V
CC
V
OUT2
V
OUT3
V
IN1
V
IN2
V
IN3
J3
J14
J20
J24
V
CC
J8
V
CC
J11
J15 (SYNC)