Marantz PS2100, Service Manual

Page: 19 / 35

80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51 1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
100
99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
P20/A16
P21/A17
P22/A18
P23/A19
P24/A20
P25/A21
P26/A22
P27/A23
P30/ALE
P31/RD
V
SS
P32/WRL
P33/WRH
P34/HRQ
P35/HAK
P36/RDY
P37/CLK
P40/SIN0
P41/SOT0
P42/SCK0
P43/SIN1
P44/SOT1
V
CC
P45/SCK1
P46/ADTG
P47
C
P71
P72
DVRH
X0A
PA2
RST
PA1
PA0
P97/POT
P96/PWC
P95/TOT2/OUT1
P94/TOT1/OUT0
P93/TOT0/IN3
P92/TIN2/IN2
P91/TIN1/IN1
P90/TIN0/IN0
RX
*
TX
*
P65/CKOT
P64/PPG0
P63/PPG1
P62/SCK2
P61/SOT2
P60/SIN2
P87/IRQ7
P86/IRQ6
P85/IRQ5
P84/IRQ4
P83/IRQ3
P82/IRQ2
HST
MD2
X1A
P17/AD15 P16/AD14 P15/AD13 P14/AD12 P13/AD11 P12/AD10 P11/AD09 P10/AD08 P07/AD07 P06/AD06 P05/AD05 P04/AD04 P03/AD03 P02/AD02 P01/AD01 P00/AD00 V
CC
X1 X0 V
SS
DV
SS
P73/DA00 P74/DA01
P50/AN0/SIN3
P51/AN1/SOT3 P52/AN2/SCK3
P53/AN3
V
SS
P54/AN4/SIN4
P55/AN5/SOT4 P56/AN6/SCK4
P57/AN7
P80/IRQ0 P81/IRQ1
MD0 MD1
AV
CC
AVRH AVRL
AV
SS
* : N.C. pin on the MB90587
1 24 VREF SYR
2 23 MPXIN CE
3 22 Vdda DI
4 21 Vssa CL
5 20 FLOUT DO
6 19 CIN
LC72722M
Top view
RDS-ID
7 18 T1 SYNC
8 17 T2 T7(CORREC/ARI-ID/TA/BEO)
9 16 T3(RDCL) T6(ERROR/57K/TP/BE1)
10 15 T4(RDDA) Vssd
11 14 T5(RSFT) Vddd
12 13 XOUT XIN
REFERENCE
VOLTAGE
ANTIALIASING
FILTER
SMOOTHING
FILTER
57 kHz
BPF
(SCF)
TEST
+
–
PLL
(57 kHz)
VREF
CLOCK
RECOVERY
(1187.5 Hz)
DATA
DECODER
SYNC
DETECT-2
SYNC
DETECT-1
OSC/DIVIDER
MEMORY CONTROL
CLK(4.332 MHz)
+5V +5V
Vdda
Vssa
MPXIN
T2
T3 to T7
T1
CCB
DI
CE
CL
RAM
(24 BLOCK DATA)
ERROR CORRECTION
(SOFT DECISION)
SYNC/EC CONTROLLER
DO
XIN XOUT
SYR
SYNC
RDS-ID
Vssd
Vddd
CIN FLOUT
VREF
Pin PORT Name of port I/O Desc ription
1 P20/A16 P-DOWN I Power Detect LOW:SUB-CLOCK Power Detect=H
2 P21/A17 CLK O ANA .SW/PLL /RDS CLOCK Active H
3 P22/A18 DO O ANA .SW/PLL /RDS DATA OUT Active H
4 P23/A19 CE0 O ANA .SW/PLL .RDS CE Active H
5 P24/A20 SYS_SW I Sys tem Switch INPUT SYSTEM =L, INT=H
6 P25/A21 SD I TUNER SD INPUT Active L
7 P26/A22 CE1 O ELE.VOLUME CE Active H
8 P27/A23 RDS-KIL O RDS DECODER OSC KILL ER Active L
9 P30/ALE PLL -DI I DATA INPUT FROM PLL
10 P31/RD RDS-DI I DATA INPUT FROM RDS
11 VSS GND
12 P32/WRL LCD_
_BT_CNCL)
DIM O LCD BACK LIGHT DIMMER DARK :L,NORMAL:H
13 P33/WRH
(AM
AM BEAT CANCEL AM BEAT CANCEL NORM : H, ON : L for PS2100 O
14 P34/HRQ CE2 O CS WRITE Active : L for PS2100
15 P35/HAK Timer-LED O Timer-LED,TIMER:ACTIVE Active :H
16 P36/RDY POWER_ON O Power Con trol Power ON; H
17 P37/CLK IR-KILL O IR Sensor KILL ER KILL =L
18 P40/SIN0 TTXD I Flash Writer Conn ection
19 P41/SOT0 RC-OUT
TRXD O REMOTE Con trol bus Outpu t
Flash Writer Conn ection
20 P42/SCK0 TCK I Flush Writer Conn ection
21 P43/SIN1 RC-IN O REMOTE Con trol bus(U-ART)INPUT
22 P44/SOT1 N.C
23 VCC +5STB -- Vcc
24 P45/SCK1 CS RESET O CS RESET Outpu t Active H for PS2100
25 P46/ADTG CS Lo ad O CS Lo ad Outpu t Active L for PS2100
26 P47 N.C.
27 C C
28 P71 N.C
29 P72 N.C
30 DVRH GND I
31 DVSS GND I
32 P73/DA00 N.C. I
33 P74/DA01 2/5 OUT O 2CH/5CH CONTROL Outpu t 5CH:H,2CH:L for PS2100
34 AVCC +5STB -- Vcc
35 AVRH +5STB -- Vcc
36 AVRL GND
37 AVSS GND
38 P50/AN0/SIN3 KEY_IN_0 I KEY_0 Inpu t
39 P51/AN1/SOT3 KEY_IN_1 I KEY_1 Inpu t
40 P52/AN2/SCK3 OLD/NEW I OLD/NEW mod e set H:OLD PCB
41 P53/AN3 RDS I RDS mod e set H:RDS
42 VSS GND
43 P54/AN4/SIN4 JPN I JAPAN Destination . set H:JAPAN
44 P55/AN5/SOT4 MODEL I SR/PS MODEL set H:PS2100
45 P56/AN6/SCK4 N.C. I
46 P57/AN7 N.C. I
47 P80/IRQ0 ROT_V_A I Rotary Encoder(Volume) Inpu t A Active H
48 P81/IRQ1 ROT_V_B I Rotary Encoder(Volume) Inpu t B Active H
49 MD0 TMODE I CPU mod e set Flush Writer con nection
50 MD1 MD1 I CPU mod e set Fixed High
51 MD2 TAUX3 I/O CPU mod e set, Flush Writer conn ection
52 HST HST I Hardware standby HOLD LOW:STOP
53 P82/IRQ2 D_MOTOR_REV O Doo r REV. Motor ON Active H
54 P83/IRQ3 D_MOTOR_FWD O Doo r FWD. Motor ON Active H
55 P84/IRQ4 D_OPEN_SW I Doo r Open detect Active L
56 P85/IRQ5 D_CLOSE_SW I Doo r Close detect Active L
57 P86/IRQ6 ROT_J_A I Rotary Encoder(JOG) Inpu t A Active H
58 P87/IRQ7 ROT_J_B I Rotary Encoder(JOG) Inpu t B Acti ve H
59 P60/SIN2 H.P_
_
SW I Mod e set by Headp hon e Switch L:Normal, H:2ch
60 P61/SOT2 MUTE O Aud io Mute ou tpu t ON:H
61 P62/SCK2 CE3 O RDS Decod er CE ou tput Active H
62 P63/PPG1 N.C. I
63 P64/PPG0 N.C I
64 P65/CKOT N.C. I
65 TX N.C. O
66 RX N.C. I Fixed LOW
67 P90/TIN0/IN0 RC IN I IR/RC5 INPUT
68 P91/TIN1/IN1 N.C. I
69 P92/TIN2/IN2 N.C. I
70 P93/TOT0/IN3 N.C. I
71 P94/TOT1/OUT0 N.C. I
72 P95/TOT2/OUT1 N.C. I
73 P96/PWC N.C. I
74 P97/POT N.C. I
75 PA0 N.C. I
76 PA1 N.C. I
77 RST RST I CPU RESET Low:RESET
78 PA2 N.C. I
79 X1A 32kHz X’tal -- 32kHz X-tal Con nect.
80 X0A 32kHz X’tal -- 32kHz X-tal Con nect.
81 VSS GND
82 X0 8MHz X’tal -- 8MHz Ceramic Resonator Conn ect
83 X1 8MHz X’tal -- 8MHz Ceramic Resonator Conn ect
84 VCC +5STB -- Vcc
85 P00/AD00 TAUX I/O Flush Writer Conn ection
86 P01/AD01 --- I CPU mod e set Fixed High
87 P02/AD02 RST O LCD Driver RESET Active L
88 P03/AD03 LCD_RW O LCD Driver R/W Active L
89 P04/AD04 LCD_/RD O LCD Driver RD Active L
90 P05/AD05 A0 O LCD Driver mod e set Refer NJU6450 data sheet
91 P06/AD06 N.C I
92 P07/AD07 N.C I
93 P10/AD08 D0 I/O LCD Driver data set
94 P11/AD09 D1 I/O LCD Driver data set
95 P12/AD10 D2 I/O LCD Driver data set
96 P13/AD11 D3 I/O LCD Driver data set
97 P14/AD12 D4 I/O LCD Driver data set
98 P15/AD13 D5 I/O LCD Driver data set
99 P16/AD14 D6 I/O LCD Driver data set
100 P17/AD15 D7 I/O LCD Driver data set
BLOCK DIAGRAM
Q351 : LC72722M
QU01 : PIN CONFIGURATION
Q351 : PIN CONFIGURATION
PIN FUNCTION
QU01 : MB90583B
31 32