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LS-AES 

 

Page 8 

Digital I/O Panel Description 

Digital Format 

Selects AES/EBU or S/PDIF formats. This control affects the electrical 
characteristics and channel status protocol on the digital input and output

 

SRC Mode  

Selects the sample rate converter mode

On - 

The sample rate converter is enabled on the digital input. The sample 

rate of the digital input signal is converted to the current rate selected for 
the host card and LS-AES. Bit-perfect digital transfers are not possible in 
this mode. This is the default mode. Use this mode when connecting to 
external equipment that is not synchronized to the LS-AES.  

Off - 

The sample rate converter is disabled. In this mode, the digital input 

signal must be synchronous to the clock source driving the host card and 
LS-AES in order to prevent signal errors. Digital input data is transferred 
bit-perfect. Use this mode when connecting to external devices that are 
locked to a clock source that is common to the LS-AES or host card. This 
mode is also valid if the digital input is selected as the clock source for the 
LS-AES.

 

On: Digital Out 

– The sample rate converter is enabled on the digital output. 

The sample rate of the digital output signal is converted to the sample rate 
received on the corresponding digital input.

 

SRC Ratio 

Indicates the sample rate conversion ratio in either of SRC On modes.

 

Digital In 
Mode  

Indicates either 

Professional

 or 

Consumer

 digital input status. Professional 

status is generally associated with an AES/EBU signal, and consumer status is 
generally associated with an S/PDIF signal.

  

 

Digital In 
Status 
Indicators  

Indicates various digital inputs status: 

Lock – 

Red: receiver PLL not locked, Green: receiver PLL locked 

Validity

 – Green: channel status validity bit set 

Copyright

 – Green: SCMS copyright bit set, consumer mode only 

Original

 – Green: SCMS original bit set, consumer mode only 

Non Audio

 – Green: channel status non-audio bit set. Typically set when 

non-PCM data is received, e.g. Dolby Digital, DTS 

Parity 

– Red: parity error detected 

Confidence 

– Red: signal quality degraded 

Biphase – 

Red: bi-phase coding error

 

detected 

CS CRC –

 Red: channel status CRC error detected 

Q CRC 

– Red: subcode data CRC detected 

Digital Out 
Valid 

Sets the validity bit in the digital output channel status. 

Digital Out 
Non-Audio 

Sets the non-audio bit in the digital output channel status. This bit must be set 
when transmitting non-PCM data such as Dolby Digital and DTS.

 

Digital Out 
Emphasis 

Sets the emphasis bit in the digital output channel status.

 

Summary of Contents for LS-AES

Page 1: ...LS AES Owner s Manual interstage Phistersvej 31 2900 Hellerup Danmark Telefon 3946 0000 fax 3946 0040 www interstage dk pro audio with a smile...

Page 2: ......

Page 3: ...rnal Card Installation 5 External Connections 6 LynxTWO L22 Mixer Controls 7 LStream Panel Control Description 7 Digital I O Panel Description 8 LStream Interface to the Host LynxTWO L22 9 LS AES Outp...

Page 4: ...the installation procedure and use of the LS AES You should have a working knowledge of Windows and general PC concepts Additionally refer to the User s Guide included with your LynxTWO or L22 Conten...

Page 5: ...h a keyboard or mouse action Warranty Registration We are committed to providing you with the best service possible To help us serve you better please be sure to register your LS AES using one of the...

Page 6: ...of firmware installed on your LynxTWO L22 will support the LS AES You can determine the firmware version by selecting About Mixer in the Mixer menu of the LynxTWO L22 Mixer Verify the firmware versio...

Page 7: ...elow The LS AES must be secured to the computer chassis with a screw 3 The included LStream ribbon cable connects a LynxTWO L22 to either one or two LS AES internal cards Locate the cable end terminat...

Page 8: ...cable connect directly to equipment with AES EBU ports For S PDIF coaxial connections use Lynx XLR to RCA S PDIF adapters CBL XFDRM18 and CBL XMDRM18 The following table shows the audio signal channel...

Page 9: ...ream and LS AES routing The remaining four panels labeled Digital I O n provide control and status for the LS AES s digital inputs and outputs LStreamPanelControlDescription Device ID LStream device i...

Page 10: ...he sample rate of the digital output signal is converted to the sample rate received on the corresponding digital input SRC Ratio Indicates the sample rate conversion ratio in either of SRC On modes D...

Page 11: ...he architecture of LynxTWO L22 digital mixer supports a maximum of 16 input and 16 output channels that can assigned as needed to the available physical I O s Controlling the digital mixer requires an...

Page 12: ...oopback Registers Digital Out L R LStream 1 Bracket Port Output LStream 2 Header Port Output Dual Internal Output 1 8 1 8 9 16 Select Format LStream 2 Transmitter 1 8 9 16 Select Format LStream 1 Tran...

Page 13: ...elect control on the LStream page of the LynxTWO L22 Mixer has two settings 9 16 1 8 Maps mixer output channels 9 16 to LStream output channels 1 8 This is the default setting 1 8 9 16 Maps mixer outp...

Page 14: ...nternal LStream 2 Receiver Input Submixer 1 16 Input Select Mute Dither Peak Level Digital Mixer Inputs LStream Channels 1 16 Serial data on ribbon cable LynxTWO A Model Input Section Record Bus 16 Ch...

Page 15: ...44 1k 48k Dual wire connections require two digital input or output connections to transfer two audio channels Quad wire connections require four digital input or output connections to transfer two au...

Page 16: ...vices must run synchronously from a common clock source There are only two scenarios to consider that satisfy this requirement 1 The LynxTWO L22 host card is the clock master The LS AES and external A...

Page 17: ...d description of the problem including any error messages you received We will provide a response in a timely manner Telephone support is available by calling 949 515 8265 ext 206 from 9AM to 5PM Paci...

Page 18: ...any LS AES digital input Modes Master mode utilizes LynxTWO or L22 low jitter sample clock to drive external AES devices Slave mode word clock derived from any digital input ARCHITECTURE Core FPGA ba...

Page 19: ...the right to change or improve design of the product at any time without prior notice This warranty does not cover claims for damage due to abuse neglect alteration or attempted repair by unauthorize...

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