
DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Information Manual
Instruction Set Summary
April 1998
B-3
DRAFT COPY
Lucent Technologies Inc.
if CON goto/call/return
(conditional branch qualifier)
test CONdition;
if true, execute the following control statement
The condition CON is tested (encoded in the CON field). If the condition is true, the next instruction (which must be
a control instruction) is executed. If false, the control instruction is not executed.
The ensuing control opcode can be any of the following:
goto JA
goto pt
call JA
call pt
return (goto pr)
Note: ireturn and icall are the only control instructions that cannot be conditionally executed.
Table B-1. CON Field Encoding
CON
Flag
CON
Flag
00000
mi (negative result)
10000
gt (result > 0)
00001
pl (positive result)
10001
le (result
≤
0)
00010
eq (result = 0)
10010
allt (all BIO bits true)
00011
ne (result
≠
0)
10011
allf (all BIO bits false)
00100
lvs (logical overflow set)
10100
somet (some BIO bits true)
00101
lvc (logical overflow clear)
10101
somef (some BIO bits false)
00110
mvs (math. overflow set)
10110
oddp (BMU odd parity result)
00111
mvc (math. overflow clear)
10111
evenp (BMU even parity result)
01000
heads (random bit set)
11000
mns1 (BMU minus 1 result)
01001
tails (random bit clear)
†
† The random bit used is updated after each test of heads or tails.
11001
nmns1 (BMU not minus 1 result)
01010
c0ge (counter0
≥
0)
‡
‡ Using the c0ge or c0lt conditions causes the value of the c0 counter to be postincremented. Using the c1ge or c1lt condi-
tions also causes the value of the c1 counter to be postincremented.
11010
npint (JTAG handshake)
01011
c0lt (counter0 < 0)
11011
njint
01100
c1ge (counter1
≥
11100
lock (DSP1627/28/29 only)
ebusy (DSP1618 only)
01101
c1lt (counter1 < 0)
11101
ebusy (DSP1628 only)
01110
true (always)
11110
Reserved
01111
false (never)
11111
Reserved
Bit
15
14
13
12
11
10
9
8
7
6
5
4—0
Field word 1
1
1
0
1
0
0
0
0
0
0
0
CON
word 2
CONTROL OPCODE
Words: 1 (not including the control statement)
Cycles: 3 (including the branch/call/return)
Group: Control
Addressing: None
Flags affected: None
Interruptible: No
Cacheable: No
Format: 6
Summary of Contents for DSP1611
Page 18: ...Chapter 1 Introduction...
Page 27: ...Chapter 2 Hardware Architecture...
Page 52: ...Chapter 3 Software Architecture...
Page 116: ...Chapter 4 Instruction Set...
Page 154: ...Chapter 5 Core Architecture...
Page 176: ...Chapter 6 External Memory Interface...
Page 208: ...Chapter 7 Serial I O...
Page 237: ...Chapter 8 Parallel I O DSP1617 Only...
Page 261: ...Chapter 9 Parallel Host Interface PHIF DSP1611 18 27 28 29 Only...
Page 275: ...Chapter 10 Bit I O Unit...
Page 284: ...Chapter 11 JTAG Test Access Port...
Page 306: ...Chapter 12 Timer...
Page 313: ...Chapter 13 Bit Manipulation Unit...
Page 325: ...Chapter 14 Error Correction Coprocessor DSP1618 28 Only...
Page 350: ...Chapter 15 Interface Guide...
Page 367: ...Appendix A Instruction Encoding...
Page 379: ...Appendix B Instruction Set Summary...
Page 381: ...aD extractz aS IM16 B 52 aD insert aS arM B 53 aD insert aS IM16 B 54 aD aS aaT B 55...
Page 437: ...Index...