Lucent Technologies DSP1611, Information Manual

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Information Manual DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
April 1998 Bit I/O Unit
Lucent Technologies Inc.
DRAFT COPY
10-5
10.2 Software View
(continued)
10.2.1 Registers
The encodings for the two registers (sbit and cbit) follow:
Reset Conditions
The DIR field of sbit is set to all zeros on reset to select all pins as inputs. The VALUE field of sbit always reflects
the values on the device pins. For a pin in the output mode, an internal register stores a value for the output from
the most recent write of cbit. These internal registers are initialized to zero after reset.
Table 10-2. sbit Register Encoding
Bit 15—8 7—0
Field DIR[7:0] VALUE[7:0]
Field Value Description
DIR 1xxxxxxx IOBIT7 is an output (input if 0).
x1xxxxxx IOBIT6 is an output (input if 0).
xx1xxxxx IOBIT5 is an output (input if 0).
xxx1xxxx IOBIT4 is an output (input if 0).
xxxx1xxx IOBIT3 is an output (input if 0).
xxxxx1xx IOBIT2 is an output (input if 0).
xxxxxx1x IOBIT1 is an output (input if 0).
xxxxxxx1 IOBIT0 is an output (input if 0).
VALUE Rxxxxxxx Reads the current value of IOBIT7.
xRxxxxxx Reads the current value of IOBIT6.
xxRxxxxx Reads the current value of IOBIT5.
xxxRxxxx Reads the current value of IOBIT4.
xxxxRxxx Reads the current value of IOBIT3.
xxxxxRxx Reads the current value of IOBIT2.
xxxxxxRx Reads the current value of IOBIT1.
xxxxxxxR Reads the current value of IOBIT0.
Table 10-3. cbit Register Encoding
Bit 15—8 7—0
Field
MODE/MASK[7:0] DATA/PATTERN[7:0]
Direction Mode/Mask Data/PAT Action
1 (Output) 0 0 Clear
1 (Output) 0 1 Set
1 (Output) 1 0 No Change
1 (Output) 1 1 Toggle
0 (Input) 0 x No Test
0 (Input) 0 x No Test
0 (Input) 1 0 Test for Zero
0 (Input) 1 1 Test for One