Lucent Technologies DSP1611, Information Manual

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Information Manual DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
April 1998 Core Architecture
Lucent Technologies Inc.
DRAFT COPY
5-13
5.3 Y Address Arithmetic Unit (YAAU)
The Y address arithmetic unit (YAAU) is shown in Figure 5-6 . It consists of nine 16-bit registers and a 16-bit adder.
The Y space, or data memory, is addressed by the r0—r3 pointer registers. The j and k offset registers can be
used to postmodify registers r0—r3. The rb and re registers are used if a register addressing the RAM is applied
in a cyclical (modulo) fashion. The ybase register stores a base address for Y space direct addressing. The nine
YAAU registers are accessible to the user and can be read or written under program control.
5-4159
Figure 5-6. YAAU—Y Address Arithmetic Unit
5.3.1 Inputs and Outputs
The major output of the YAAU is the YAB that provides addresses from the YAAU to internal and external memo-
ries. Address segments are also decoded to provide separate enables to the multiple banks of on-chip, dual-port
RAM and the enables to external memory. One individual address in the IO external memory segment is also
decoded to provide an enable—DSEL
1
. All of the registers are read or written through the bidirectional data bus
IDB. IDB also provides the interface for loading immediate addresses into the registers.
1.DSEL not available in the DSP1627/28/29.
k (16)
–1, 0
1, 2
MUX
ADDER
r0 (16)
r1 (16)
r2 (16)
r3 (16)
16
ADDRESS
BUS
16
YAAU
(16)
re (16)
COMPARE
j (16)
rb (16)
ybase (16)
YAB
IDB
MUX
MEMORY
SEGMENT
ENABLES