LSI Symbios SYM53C040, Technical Manual

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Interrupts 2-33
bits for determining the exact cause of the interrupt. This activity is
described in
Table 2.6 .
Table 2.6 Interrupt Handling
ISR Bit
Number Interrupt Source
Location to read to
determine cause of
interrupt Description
7 SCSI core BSR (0xFC05) Monitors SCSI bus control
signals not found in CSBS,
plus six other status bits.
CSBS (0xFC04) Monitors SCSI bus control
lines plus data parity bit.
CSD (0xFC00), CSDHI
(0xFC08) Reads the active SCSI bus.
6 Two-wire serial port 0 Status (0xFD01) Contains PIN bit plus other
status bits.
5 Two-wire serial port 1 Status (0xFD03) Contains PIN bit plus other
status bits.
4 DMA core DMAI (0xFC14) Enables DMA interrupt.
3
2 Timer 2
Timer 1 T2C (0xFE09) Programs Timer 2, and
enables an interrupt upon
expiration of the timer.
T1C (0xFE05) Programs Timer 1, and
enables an interrupt upon
expiration of the timer.
1 8067 Port 1 or MPIO3_1 MPI3 Reads the values of
MPIO3_[1:0] pins, which also
serve as external interrupt
lines to the microcontroller
core.
PCST1 (0xFC2A) Read Interrupt and Write
Interrupt status bits.
0 8067 Port 0 or MPIO3_0 MPI3 Reads the values of
MPIO3_[1:0] pins, which also
serve as external interrupt
lines to microcontroller core.
PCST0 (0xFC22) Read Interrupt and Write
Interrupt status bits.