LSI LSI53C896, Technical Manual

Page: 52 / 370

2-26 Functional Description
2.2.8 Load/Store Instructions
The LSI53C896 supports the Load/Store instruction type, which
simplifies the movement of data between memory and the internal chip
registers. It also enables the chip to transfer bytes to addresses relative
to the
Data Structure Address (DSA) register. Load/Store data transfers
to or from the SCRIPTS RAM will remain internal to the chip and will not
generate PCI bus cycles. While a Load/Store to or from SCRIPTS RAM
is occurring, any external PCI slave cycles that occur will be retried on
the PCI bus. This feature can be disabled by setting the DILS bit in the
Chip Control 0 (CCNTL0) register. For more information on the
Load/Store instructions refer to Chapter 5, “SCSI SCRIPTS Instruction
Set.”
2.2.9 JTAG Boundary Scan Testing
The LSI53C896 includes support for JTAG boundary scan testing in
accordance with the IEEE 1149.1 specification with one exception, which
is explained in this section. This device accepts all required boundary
scan instructions including the optional CLAMP, HIGH-Z, and IDCODE
instructions.
The LSI53C896 uses an 8-bit instruction register to support all boundary
scan instructions. The data registers included in the device are the
Boundary Data register, the IDCODE register, and the Bypass register.
This device can handle a 10 MHz TCK frequency for TDO and TDI.
Due to design constraints, the RST/ pin (system reset) always 3-states
the SCSI pins when it is asserted. Boundary scan logic does not control
this action, and this is not compliant with the specification. There are two
solutions that resolve this issue:
1. Use the RST/ pin as a boundary scan compliance pin. When the pin
is deasserted, the device is boundary scan compliant and when
asserted, the device is noncompliant. To maintain compliance the
RST/ pin must be driven HIGH.
2. When RST/ is asserted during boundary scan testing the expected
output on the SCSI pins must be the HIGH-Z condition, and not what
is contained in the boundary scan data registers for the SCSI pin
output cells.
*