4-114
Registers
Registers: 0xD0–0xD3
Entry Storage Address (ESA)
Read/Write
ESA
Entry Storage Address
[31:0]
This register's value depends on the type of BMOV being
executed. The three types of BMOVs are.
Registers: 0xD4–0xD7
Instruction Address (IA)
Read/Write
IA
Instruction Address
[31:0]
This register always contains the address of the BMOV
instruction that was executing when the phase mismatch
occurred. This value will always match the value in the
except in the case of a
table indirect BMOV in which case the ESA will have the
address of the table indirect entry and this register will
point to the address of the BMOV instruction.
31
0
ESA
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Direct BMOV:
In the case of a direct BMOV, this register will contain
the address the BMOV was fetched from when the
phase mismatch occurred.
Indirect BMOV:
In the case of an indirect BMOV, this register will
contain the address the BMOV was fetched from when
the phase mismatch occurred.
Table Indirect BMOV:
In the case of a table indirect BMOV, this register will
contain the address of the table indirect entry being
used when the phase mismatch occurred.
31
0
IA
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
*
Summary of Contents for LSI53C896
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 88: ...2 62 Functional Description...
Page 112: ...3 24 Signal Descriptions...
Page 306: ...6 38 Specifications This page intentionally left blank...
Page 310: ...6 42 Specifications This page intentionally left blank...
Page 338: ...6 70 Specifications Figure 6 40 LSI53C896 329 BGA Bottom View...
Page 340: ...6 72 Specifications...
Page 346: ...A 6 Register Summary...
Page 362: ...IX 12 Index...
