TME-CLR-ECO-R0V6.docx
Rev 0.6
Page 15 of 34
LVDS
There is a LVDS transmitter channel in the LVDS interface. It consists of four data pairs and one clock pair.
The LVDS data pair is used to transfer pixel data as well as the LCD timing control signals.
There is a connector supplying the LC-Display's inverter, too.
LVDS Connector (X4)
Connector type:
Hirose DF14 30 pin header 1.25 mm, single row
Matching connector:
Hirose DF14-30S-1.25C, Part number 538-0012-3 00
Pin Signal
1
VDD (+3.3V, opt.+5V)
2
VDD (+3.3V, opt.+5V)
3
GND
4
GND
5
TXA3 -
6
TXA3 +
7
TXACLK -
8
9
GND
10
TXA2 -
11
TXA2 +
12
TXA1 -
13
TXA1 +
14
TXA0 -
15
TXA0 +
16
GND
17
NC
18
NC
19
NC
20
NC
21
GND
22
NC
23
NC
24
NC
25
NC
26
NC
27
NC
28
GND
29
LVDS DDC-CLK
30
LVDS DDC-DATA
Note:
Maximum current on VDD pins is 1A per pin.
LVDS Color mapping
The Color mapping depends on the used module. Please refer to the corresponding manual for information on the
color mapping.
