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dc2326af

DEMO MANUAL DC2326A

Dc890 Quick start proceDure

Check to make sure that all jumpers are set to their default 

settings as described in the DC2326A Jumpers section of 

this manual. The default connections configure the ADC to 

use the onboard reference and regulators to generate all 

the required bias voltages. The analog inputs by default are 

DC coupled. Connect the DC2326A to a DC890 USB High 

Speed Data Collection Board using connector P1. Then, 

connect the DC890 to a host PC with a standard USB A/B 

cable. Apply ±9V to the indicated terminals. Then apply 

a low jitter signal source to J5 and J6. Use J7 to route 

the signal sources of J5 and J6 to the desired AIN0-AIN7 

inputs. Observe the recommended input voltage range 

for each analog input. Connect a low jitter 2.5V

P-P

 sine 

wave or square wave to connector J1. See the Assembly 

Options table for the appropriate clock frequency. Note 

that J1 has a 50Ω termination resistor to ground.

Run the PScope

 software (Pscope.exe version K82 or 

later) which can be downloaded from 

www.linear.com/

designtools/software

.

Complete software documentation is available from the 

Help menu. Updates can be downloaded from the Tools 

menu.  Check  for  updates  periodically  as  new  features 

may be added.
The PScope software should recognize the DC2326A and 

configure itself automatically. 
Click the Collect button (See Figure 3) to begin acquiring 

data. The Collect button then changes to Pause, which 

can be clicked to stop data acquisition.

Dc590/Dc2026 Quick start proceDure

IMPORTANT! To avoid damage to the DC2326A, make 

sure that VCCIO (JP6 of the DC590, JP3 of the DC2026) 

of the DC590/DC2026 is set to 3.3V before connecting 

the DC590/DC2026 to the DC2326A.

To use the DC590/DC2026 with the DC2326A, it is necessary 

to apply ±9V and ground to the ±9V and GND terminals of 

the DC2326A. Connect the DC590/DC2026 to a host PC 

with a standard USB A/B cable. Connect the DC2326A to 

a DC590/DC2026 USB serial controller using the supplied 

14-conductor ribbon cable. Apply a signal source to J5 

and J6. Use J7 to route the signal sources of J5 and J6 

to the desired AIN0-AIN7 inputs. No Clock is required on 

J1 when using the DC590/DC2026. The clock signal is 

provided by the DC590/DC2026.
Run the QuikEval software (quikeval.exe version K103 or 

later) which is available from 

www.linear.com/designtools/

software

. The correct control panel will be loaded auto-

matically. Click the COLLECT button (Figure 6) to begin 

reading the ADC.

Summary of Contents for LTC2345

Page 1: ...l and SoftSpan are trademarks of Linear Technology Corporation All other trademarks are the property of their respective owners assembly options Board Photo demonstrate DC performance such as peak to peak noise and DC linearity Use the DC890 if precise sampling rates are required or to demonstrate AC performance such as SNR THD SINAD and SFDR The DC2326A is intended to demonstrate recommended grou...

Page 2: ...lp menu Updates can be downloaded from the Tools menu Check for updates periodically as new features may be added The PScope software should recognize the DC2326A and configure itself automatically Click the Collect button See Figure 3 to begin acquiring data The Collect button then changes to Pause which can be clicked to stop data acquisition dc590 dc2026 Quick Start Procedure IMPORTANT To avoid...

Page 3: ...it is recommended for lower sample rates to divide down a higher frequency clock to the desired sample rate The ratio of clock frequency to conversion rate is shown in the Assembly Options table If theclockinputistobedrivenwithlogic itisrecommended that the 49 9Ω termination resistor R4 be removed Driving R4 with discrete logic may result in slow rising edges TheseslowrisingedgesmaycompromisetheSN...

Page 4: ...Options button in the PScope tool bar shown in Figure 4 This will open the Configure Channels menu of Figure 5 In this menu it is possible to set the input signal range setting for each channel There is also a button to return PScope to the default DC2326A settings which are optimized for the default hardware settings of the DC2326A Thereareanumberofscenariosthatcanproducemislead ing results when ...

Page 5: ...of a symmetricallayoutaroundtheanaloginputswillminimize theeffectsofparasiticelements Shieldanaloginputtraces with ground to minimize coupling from other traces Keep traces as short as possible Component Selection When driving a low noise low distortion ADC such as the LTC2345 component selection is important so as to not degrade performance Resistors should have low values to minimize noise and d...

Page 6: ...6 dc2326af DEMO MANUAL DC2326A DC2326A Setup Figure 3 PScope Screen Shot Figure 4 PScope Tool Bar ...

Page 7: ...7 dc2326af DEMO MANUAL DC2326A DC2326A Setup Figure 5 PScope Configuration Menu ...

Page 8: ...8 dc2326af DEMO MANUAL DC2326A DC2326A Setup Figure 6 QuikEval Screen Shot Figure 7 QuikEval Configuration Menu ...

Page 9: ... logic levels The default setting is CMOS Only CMOS is currently supported Definitions P1 DC890 interface is used to communicate with the DC890 controller J1 CLK provides the master clock for the DC2326A when interfaced to the DC890 J2 FPGA PROGRAM is used to program the FPGA This is for factory use only JP4 EEPROM is for factory use only The default posi tion is WP JP5 JP12 AIN0 AIN7 can be used ...

Page 10: ...UDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE EXCEPT TO THE EXTENT OF THIS INDEMNITY NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES The user assumes all responsibility and liability for proper and safe handling of the goods Further the user releases LTC from all claims arising from the handling or use of the goo...

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