Linear DC1543A Demo Manual Download Page 2

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dc1543afa

DEMO MANUAL DC1543A

QUICK START PROCEDURE

Demonstration circuit 1543A is an easy way to evaluate 
the performance of the LTM4641. Please refer to Figure 
1 for proper measurement equipment setup and follow 
the procedure below:

1. Place jumpers in the following positions for a typical 

3.3V

OUT

 application:

INPUT 

OVLO

NON-LATCH INPUT 

OVP

INPUT UVLO

OVER-TEMP 

BEHAVIOR

OFF

OFF

OFF

NON-LATCH

RUN

MODE

TRACK/SS

V

OUT

 Select

F

SET

ON

CCM

SS

3.3V

V

OUT 

> 3.0V

2. With power off, connect the input power supply, load 

and meters as shown in Figure 1. Preset the load to 0A 
and V

IN

 supply to be 0V.

3. Turn on the power at the input. Increase V

IN

 to 12V 

(Do not apply more than the rated maximum voltage 
of 38V to the board or the part may be damaged).

 

The output voltage should be regulated and deliver the 
selected output voltage ±1.5%. 

4. Vary the input voltage from 4.5V to 38V and adjust 

the load current from 0A to 10A. Observe the output 

voltage regulation, ripple voltage, efficiency, and other 
parameters. Output voltage ripple may be measured at 
J6 with a BNC cable and oscilloscope. The probe channel 
for V

OUT

 should be set at 50Ω termination resistance 

to match the BNC cable.

5. (Optional) For optional load transient test, apply an 

adjustable pulse signal between IOSTEP_CLK and GND 
test points. The pulse amplitude sets the load step cur-
rent amplitude. Keep the pulse width short (<1ms) and 
pulse duty cycle low (<5%) to limit the thermal stress 
on the load transient circuit. The load step current can 
be monitored with a BNC connected to J5 (25mV/A).

6. (Optional) To test the advanced input and load pro-

tections, put the corresponding jumper in the “ON” 
position. For DC1543A, the thresholds for different 
input and output protections are set as shown below:

INPUT OVLO

36V

NON-LATCH INPUT OVP

32V

INPUT UVLO

8V for Rising Edge 

7V for Falling Edge

OVER-TEMP 

BEHAVIOR

LATCH

145°C

NON-LATCH

145°C: Cease Regulation

135°C: Resume Regulation

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Summary of Contents for DC1543A

Page 1: ...SUMMARY BOARD PHOTO protection inputlatching non latchingovervoltageprotec tion andlatching non latchingovertemperatureprotection Higherefficiencyatlowloadcurrentsisachievedbysetting the MODE pin jum...

Page 2: ...t the load current from 0A to 10A Observe the output voltage regulation ripple voltage efficiency and other parameters Output voltage ripple may be measured at J6withaBNCcableandoscilloscope Theprobec...

Page 3: ...Setup LOAD VIN Note Demo circuit 1543A demonstrates a functional but outdated square pad layout for LTM4641 Refer to the design files recommending round pads for future PCB designs available at www li...

Page 4: ...z 6 0VOUT 660kHz 0 9VOUT 235kHz 1 0VOUT 255kHz 1 2VOUT 285kHz 1 5VOUT 315kHz OUTPUT CURRENT A 0 EFFICIENCY 1 6 7 8 9 10 2 3 4 5 1 8VOUT 325kHz 2 5VOUT 335kHz 3 3VOUT 360kHz 5 0VOUT 550kHz 6 0VOUT 660k...

Page 5: ...re 29 4 C No Forced Air Flow Figure 4 Thermal Image of LTM4641 Figure 3 Measured Load Transient Responses VOUT 50mV DIV IOUT_STEP 4A DIV 3b VIN 12V VO 1 0V 0A to 4A Load Step VOUT 20mV DIV IOUT_STEP 4...

Page 6: ...0603 VISHAY CRCW06033K16FKEA 13 1 R28 RES CHIP 24 9k 1 16W 1 0603 VISHAY CRCW060324K9FKEA 14 1 R10 RES CHIP 1 78M 1 16W 1 0603 VISHAY CRCW06031M78FKEA 15 1 R24 RES CHIP 13k 1 16W 1 0603 VISHAY CRCW06...

Page 7: ...r com 2 Monday May 21 2012 1 1 HZ YAN L N A LTM4641EY DEMO CIRCUIT 1543A REVISION HISTORY DESCRIPTION DATE APPROVED ECO REV YAN L PRODUCTION 2 6 22 11 __ REVISION HISTORY DESCRIPTION DATE APPROVED ECO...

Page 8: ...IS INDEMNITY NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES The user assumes all responsibility and liability for proper and safe handling of t...

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