8
Rev. 0
GENERAL DESCRIPTION
Power supply
3.3V power is generated on-board using LT3045 (U3) low
noise LDO at either VCCI or VCCO test point. Input power
is either applied externally at VIN test point and ground,
or, alternatively, the 5V from the SDP-K1 board (if pres-
ent) is used as the raw input power source. Move switch
S1 to the left (away from P11 to use an external power
supply and to the right (towards P11) to use the SDP-K1
(if present) 5V power.
U3 powers both LTC6563 supply rails (VCCI and VCCO)
which are tied together at one point on the board through
a 0Ω resistor (R49). VCCI and VCCO both should read
close to 3.3V when powered properly.
APD Negative Bias
To be applied between P7-1 (GND), and P7-2 (APD bias).
Range is –70V to –200V depending on the temperature.
–120V is used for this board testing at the factory. Use
caution when handling the board because of this high
voltage.
Figure 10. Shorting Blocks Position to Switch between DAC Control vs External Voltage Control
Board ID EEPROM
Mounted on the board bottom (U5). Used to identify
the board when SDP-K1 (if present) is plugged onto the
board. In addition, the EEPROM will restore the device to
the last saved state and DAC settings at power up.
CM, Tilt, Offset, HI Controls
These LTC6563 control voltages can be externally applied
to the board test points designated as such on the board
silkscreen. Alternatively, there is a 4-channel 10-bit DAC
(LTC2634, U2) on the EVAL board which can be used
to control these 4 pins with the SDP-K1 board (if pres-
ent). To use the DAC for control, move the corresponding
shorting jumper (1P1 to 1P4, 3 pins select, 4 jumpers)
towards the board top edge (toward P8), as highlighted in
Figure 10. For information about these control voltages,
consult the LTC6563 data sheet.
