3
dc1815afc
DEMO MANUAL DC1815A
operation
Introduction
The DC1815A demonstrates the features and capabilities
of the LTC4266A, a quad controller for LTPoE++ power
sourcing equipment. The DC1815A provides a quick and
simple PSE solution requiring only a VEE supply.
Supply Voltages
Select a VEE supply with enough power to sustain all four
ports at maximum load. Table 1 shows the maximum
delivered PD power of a single port as well as a recom-
mended VEE power supply minimum to avoid drooping in
a worst-case scenario with I
LIM
current at all four ports.
The LTC4266A also requires a digital 3.3V supply. The
DC1815A uses a simple LDO regulator circuit to power the
3.3V digital supply from the VEE supply. The LTC4266A
VDD supply is allowed to be within 5V above or below
AGND. On the DC1815A, VDD is tied to AGND and DGND
is a negative voltage below AGND. D1, R5, Q5, R14, R15,
and R25 generate the negative voltage referenced to
AGND (Figure 2). These components are sized to handle
the power required to supply the LTC4266A and LEDs on
the DC1815A. Contact Linear Technology Applications
for 3.3V options.
AUTO Pin
The LTC4266A AUTO pin is set high or low with jumper
JP4 on the DC1815A. With the AUTO pin high after a
device reset or power on, the LTC4266A operates in fully
autonomous mode without the need for a microcontroller.
The LTC4266A will automatically detect, classify, and
power on IEEE 802.3at Type 1, Type 2 and LTPoE++ PDs
up to the power level rating of the LTC4266A version used.
For full control via I
2
C, the AUTO pin is to be pulled low.
Modification of the AUTO pin jumper requires a device
reset or power cycle.
Endpoint vs Midspan
The LTC4266A can be configured either for endpoint or
midspan operation by setting the MID pin high or low
respectively. This is selected with jumper JP5 on the
DC1815A. The MID pin high state enables a two second
detection back-off timer. The LTC4266A must be reset or
power-cycled for the MID pin to be detected. For proper
midspan operation the AUTO pin must also be high.
I
2
C Control
The LTC4266A is a slave-only I
2
C device, and commu-
nicates with a host using a standard SMBus/I
2
C 2-wire
interface. On the DC1815A, a host can be connected to
the SCL and SDA test points. Optionally, a DC590B board
can be connected with a 14-pin ribbon cable to header J6.
The LTC4266A has separate pins for SDAIN and SDAOUT to
facilitate the use of opto-couplers. The SDAIN and SDAOUT
lines are tied together on the DC1815A with a shunt resis-
tor (R10) to provide a traditional bi-directional SDA line.
The 7-bit I
2
C address of the LTC4266A is 010A
3
A
2
A
1
A
0
b,
where A
3
through A
0
are determined by pins AD3 through
AD0 respectively. On the DC1815A board the state of
these pins are controlled by the quad DIP switch, S1.
All LTC4266 chips also respond to the global address
0110000b regardless of the state of their AD3-AD0 pins.
Interrupts are signaled by the LTC4266A to the host via
the
INT
pin. A red LED on the DC1815A indicates if the
INT
line is being pulled low.
Figure 2. DC1815A LDO Circuit for the LTC4266A Digital Supply.