LTC4245CUHF
5
range. The result is displayed in the
ADC Data section of the LTC4245 soft-
ware window on the computer.
PRECHARGE
As soon as the LTC4245 3V
IN
pin is
powered up, the PRECHARGE turret can
source up to 70mA at 1V. This is used
in CPCI to pre-bias the bus I/O lines
during insertion. The turret facili-
tates hooking up the PRECHARGE pin to
external circuitry.
INTVCC
INTVCC was included on the LTC4245 to
allow bypassing of the internal 5.5V
supply rail for superior noise immu-
nity. It is also permissible to steal
a small current of up to 3mA off the
INTVCC pin to bias address pins or
ancillary circuits. A turret is pro-
vided for connections to INTVCC.
CONNECTORS
J1: Plug-in card female CompactPCI
connector. This connector mates with
the P1 connector on the backplane
board to allow power and control sig-
nals to flow to the LTC4245 and the
supply outputs. The connector util-
izes guiding features to ensure cor-
rect polarized mating.
P1: Backplane card male CompactPCI
connector. There are three lengths of
pins on this connector. Long 5V, 3.3V
and GND pins provide early power to
the LTC4245. Majority of the pins are
medium length. The short BD_SEL# pin
mates last, and provides the turn-on
signal to the LTC4245.
P2 I
2
C PORT: Connector for DC590 I
2
C
adapter card. This card converts a
computer’s USB port to I
2
C. If P2 is
not connected, the turret terminals
SDA and SCL can be connected directly
to an I
2
C bus.
JUMPERS
JP1 BD_SEL#: Connects BD_SEL# back-
plane signal either to ground or
leaves it floating, whereby it will
be pulled up by the 1.2k on the
plug-in card to 5V. In the latter
case, the BD_SEL# turret can be con-
nected to external insertion-detect
logic to initiate turn-on of LTC4245.
Removing and reinstalling the shunt
at LOW will cycle power to the board
and also reset the LTC4245 fault reg-
isters.
JP2 PCI_RST#: Sets the backplane re-
set signal PCI_RST# high, low or
floating. When floating, the PCI_RST#
turret should be driven with an ex-
ternal signal. This jumper will af-
fect the LOCAL_PCI_RST# output of the
LTC4245 (LED D10).
JP3 ON CONFIG: At start-up the
LTC4245 operates in one of two modes:
in AUTO mode it turns on when BD_SEL#
goes low; in I2C mode it waits for an
I
2
C turn-on command, even after
BD_SEL# goes low, to turn-on the
switches.
JP4 CFG: Sets the CFG pin high, low
or floating. This affects the input
supply range requirement for FET
turn-on. For a CPCI application re-
quiring all four supplies, set it
low. Refer the Performance Summary
table and the datasheet for more de-
tails.
JP5 PGI: Sets the PGI pin of the
LTC4245 high, low or floating. When
floating, the PGI turret should be
driven with an external signal, such
as the RESET# output of an external
supply monitor. Setting the PGI pin
