Linear Technology LT3081 Datasheet Download Page 19

LT3081

19

3081fc

For more information 

www.linear.com/LT3081

Connecting a resistor from I

MON

 to ground converts the 

I

MON

 pin current into a voltage to allow for monitoring by 

an ADC. With a 1k resistor, 0mV to 300mV indicates 0A 

to 1.5A of load current. 

Compensating for Cable Drops with I

MON

The I

MON

 pin can compensate for resistive drops in wires 

or cables between the LT3081 and the load. Breaking the 

SET resistor into two pieces adjusts the output voltage as a 

function of load current. The ratio of the output wire/cable 

impedance to the bottom resistor should be 1:5000. The 

sum total of the two SET resistor values determines the 

initial output voltage. Figure 11 shows a typical application 

and formulas for calculating resistor values.  

PC board, copper traces and planes. Surface mount heat 

sinks, plated through-holes and solder-filled vias can also 

spread the heat generated by power devices.
Junction-to-case thermal resistance is specified from the 

IC junction to the bottom of the case directly, or the bot-

tom of the pin most directly in the heat path. This is the 

lowest thermal resistance path for heat flow. Only proper 

device mounting ensures the best possible thermal flow 

from this area of the packages to the heat sinking material.

Note that the exposed pad of the DFN and TSSOP pack-

ages and the tab of the DD-Pak and TO-220 packages 

are electrically connected to the output (V

OUT

).

Tables 3 through 5 list thermal resistance as a function 

of copper areas on a fixed board size. All measurements 

were taken in still air on a 4-layer FR-4 board with 1oz 

solid internal planes and 2oz external trace planes with a 

total finished board thickness of 1.6mm. 

Table 3. DF Package, 12-Lead DFN

COPPER AREA

BOARD AREA

THERMAL RESISTANCE 

(JUNCTION-TO-AMBIENT)

TOPSIDE*

BACKSIDE

2500mm

2

2500mm

2

2500mm

2

18°C/W

1000mm

2

2500mm

2

2500mm

2

22°C/W

225mm

2

2500mm

2

2500mm

2

29°C/W

100mm

2

2500mm

2

2500mm

2

35°C/W

*Device is mounted on topside

Table 4. FE Package, 16-Lead TSSOP

COPPER AREA

BOARD AREA

THERMAL RESISTANCE 

(JUNCTION-TO-AMBIENT)

TOPSIDE*

BACKSIDE

2500mm

2

2500mm

2

2500mm

2

16°C/W

1000mm

2

2500mm

2

2500mm

2

20°C/W

225mm

2

2500mm

2

2500mm

2

26°C/W

100mm

2

2500mm

2

2500mm

2

32°C/W

*Device is mounted on topside

Table 5. R Package, 7-Lead DD-Pak

COPPER AREA

BOARD AREA

THERMAL RESISTANCE 

(JUNCTION-TO-AMBIENT)

TOPSIDE*

BACKSIDE

2500mm2

2500mm2

2500mm2

13°C/W

1000mm2

2500mm2

2500mm2

14°C/W

225mm2

2500mm2

2500mm2

16°C/W

*Device is mounted on topside

applicaTions inForMaTion

Figure 11. Using I

MON

 to Compensate for Cable Drops

Thermal Considerations

The LT3081’s internal power and thermal limiting circuitry 

protects itself under overload conditions. For continuous 

normal load conditions, do not exceed the 125°C (E- and 

I-grades) or 150°C (H- and MP-grades) maximum junc-

tion temperature. Carefully consider all sources of thermal 

resistance from junction-to-ambient. This includes (but is 

not limited to) junction-to-case, case-to-heat sink inter-

face, heat sink resistance or circuit board-to-ambient as 

the application dictates. Consider all additional, adjacent 

heat generating sources in proximity on the PCB.
Surface  mount  packages  provide  the  necessary  heat 

sinking by using the heat spreading capabilities of the 

LT3081

IN

C

IN

1µF

C

OUT

10µF

3081 F11

OUT

SET

R

SET

29.8k

R

COMP

 = 5000 • R

CABLE(TOTAL)

V

OUT(LOAD)

 = 50µA (R

SET

 + R

COMP

)

R

CABLE2

0.02Ω

R

CABLE

0.02Ω

R

COMP

200Ω

I

MON

LOAD

Summary of Contents for LT3081

Page 1: ...ed thermal performance 7 lead TO 220 7 leadDD Pak andan12 lead4mm 4mmDFN Wide Safe Operating Area Supply Applications n Extended Safe Operating Area n Maximum Output Current 1 5A n Stable with or with...

Page 2: ...PAD PIN 13 IS OUT MUST BE SOLDERED TO PCB FE PACKAGE 16 LEAD PLASTIC TSSOP 1 2 3 4 5 6 7 8 TOP VIEW 16 15 14 13 12 11 10 9 OUT OUT OUT OUT OUT ILIM SET OUT OUT IN IN IN IN TEMP IMON OUT 17 OUT TJMAX...

Page 3: ...LT3081T7 7 Lead Plastic TO 220 55 C to 150 C Consult LTC Marketing for parts specified with wider operating temperature ranges The temperature grade is identified by a label on the shipping container...

Page 4: ...LT3081 dropout is specified as the minimum input to output voltage differential required supplying a given output current Note 5 Adding a small capacitor across the reference current resistor lowers...

Page 5: ...0 25 25 75 125 2 0 0 5 0 5 1 5 1 5 ILOAD 5mA VOS DISTRIBUTION mV 2 N 3195 1 0 3081 G04 1 2 INPUT TO OUTPUT DIFFERENTIAL V 0 1 0 OFFSET VOLTAGE mV 0 6 0 2 0 2 6 12 18 24 3081 G05 30 0 6 1 0 0 8 0 4 0 0...

Page 6: ...SOP AND DFN CASE TEMPERATURE C 50 POWER W 10 20 150 3081 G13 0 70 90 110 60 80 100 120 130 140 30 5 15 25 VIN VOUT 20V LIMITED BY FOLDBACK CURRENT LIMIT VIN VOUT 10V VIN VOUT 5V JC 3 C W RILIM k 0 0 P...

Page 7: ...5A TIME s 0 OUTPUT VOLTAGE DEVIATION mV LOAD CURRENT mA 200 100 0 40 45 3081 G21 600 400 0 10 20 30 5 50 15 25 35 200 200 100 VIN 3V VOUT 1V CSET 30pF COUT 0 ILOAD 100mA TO 500mA tr tf 1 s TIME s 0 OU...

Page 8: ...10 100 40 RIPPLE REJECTION dB 50 60 70 80 1k 10k 100k 1M 10M 3081 G31 30 20 10 0 90 100 ILOAD 100mA ILOAD 500mA ILOAD 1 5A COUT 2 2 F CERAMIC CSET 0 1 F VIN VOUT NOMINAL 2V FREQUENCY Hz 10 100 40 RIP...

Page 9: ...2 F CSET 0 1 F TEMPERATURE C 50 RIPPLE REJECTION dB 18 22 150 3081 G36 14 10 0 50 100 25 25 75 125 26 16 20 12 24 VIN VOUT NOMINAL 2V RIPPLE 200mVP P f 1MHz ILOAD 0 1A COUT 2 2 F CERAMIC CSET 0 1 F F...

Page 10: ...stor value is 360mA k with a 450 offset If programmable current limit is not used leave this pin open the internal current limit of the LT3081 is still active keeping the device inside safe operating...

Page 11: ...ors such as the LT1086 loop gain changes with output voltage and bandwidth changes if the adjustment pin is bypassed to ground For the LT3081 the loop gain is unchanged with output voltage changes or...

Page 12: ...rror Leakagesofthismagnitude coupled with other sources of leakage can cause signifi cant offset voltage and reference drift especially over the possible operating temperature range Figure 2 depicts a...

Page 13: ...s is to use multiple resis tors in parallel to create ROUT allowing the same wattage and type of resistor as RSET Programming Current Limit Externally A resistor placed between ILIM and OUT on the LT3...

Page 14: ...citors used to decouple individual components powered by the LT3081 increase the effec tive output capacitor value For improvement in transient performance place a capacitor across the voltage setting...

Page 15: ...cationswhereasinglecapacitorisunacceptable Figure 5alternatelyshowsaseriesRCnetworkconnectedacross the two terminals of the current source This network has the added benefit of limiting the discharge...

Page 16: ...efficients as shown in Figures 7 and 8 When used with a 5V regulator a 16V 10 F Y5V capacitor can exhibit an effective value as low as 1 F to 2 F for the DC bias voltage appliedandovertheoperatingtemp...

Page 17: ...urther spread the heat if the input to output difference is high If the increase in load regulation from the ballast resis tors is unacceptable the IMON output can be used to compensate for these drop...

Page 18: ...nection by returning the bottom of the voltage setting resistor to the negative side of the load see Figure 10 Connected as shown system load regulation is the sum of the LT3081 s load regulation and...

Page 19: ...ernal planes and 2oz external trace planes with a total finished board thickness of 1 6mm Table 3 DF Package 12 Lead DFN COPPER AREA BOARD AREA THERMAL RESISTANCE JUNCTION TO AMBIENT TOPSIDE BACKSIDE...

Page 20: ...er these conditions equals PTOTAL VIN VOUT IOUT PTOTAL 2 625V 0 9V 1A 1 73W Junction Temperature equals TJ TA PTOTAL JA using tables TJ 50 C 1 73W 14 C W 74 2 C In this case the junction temperature i...

Page 21: ...absolute value and voltage ratings over the operating temperature range Leakages in capacitors or from solder flux left after insuf ficientboardcleaningadverselyaffectslowcurrentnodes such as the SET...

Page 22: ...ow if OUT is greater than IN is less than 1mA typically under 100 A protecting the LT3081 and sensitive loads Clamping diodes and 400 limiting resistors protect the LT3081 s SET pin relative to the OU...

Page 23: ...IN 22 F 20k OUT VIN 3V TO 18V IMON SET LT3081 0 1 F 22 F 1k 5 1k IN 20k OUT IMON SET LT3081 100k 0 47 F 5 1k 5 1k 0 1 F 1k IN OUT IMON SET LT3081 20k VOUT 1V 4 5A 100k 0 47 F 5 1k 0 1 F 1k 3081 TA05 1...

Page 24: ...FB 1 F 10 F V IN 30V 10 H 1k 49 9k 4 99k 100k 60 4k 22 F 47 F TPO610T ARDUINO A2 PORT ARDUINO GND PORT 10 F 2 6V IN SET OUT LT3092 10 A 49 9K 562 IN SET TEMP I MON I LIM 10m OUT LT3081 I SET 50 A V OU...

Page 25: ...S LT3081 IS OFF WITH NO LOAD MULTIPLE LT3081s CAN BE USED IN SET TEMP IMON ILIM 20m 5V OUT LT3081 ISET 50 A 3081 TA08 6 2k 10 F LT1963 3 3 47 F 20m 1k 1k 1k LT1019 VOUT MIN LOAD 5mA IN SET TEMP IMON I...

Page 26: ...Resistor Using an External Reference Current 20k IN SET 1k TEMP IMON ILIM OUT LT3081 ISET 50 A 1 F 3081 TA12 1k IN SET OUT LT3092 10 A 1mA VIN VOUT 0V TO 20V 20k 215 1 F RSET 2k VOUT 0 2V 5mA RSET IN...

Page 27: ...0 15mm ON ANY SIDE 5 EXPOSED PAD SHALL BE SOLDER PLATED 6 SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE PIN 1 TOP MARK NOTE 6 0 40 0 10 1 6 12 7 BOTTOM VIEW EXPO...

Page 28: ...3 05 120 3 58 141 3 58 141 4 70 185 MILLIMETERS INCHES NOTE 1 CONTROLLING DIMENSION MILLIMETERS 2 DIMENSIONS ARE IN 3 DRAWING NOT TO SCALE 4 RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHM...

Page 29: ...9 4 191 700 728 17 780 18 491 045 055 1 143 1 397 165 180 4 191 4 572 095 115 2 413 2 921 013 023 0 330 0 584 620 15 75 TYP 155 195 3 937 4 953 152 202 3 860 5 130 260 320 6 604 8 128 147 155 3 734 3...

Page 30: ...TYP 045 055 1 143 1 397 165 180 4 191 4 572 330 370 8 382 9 398 060 1 524 TYP 390 415 9 906 10 541 15 TYP 420 350 585 090 035 050 325 205 080 585 RECOMMENDED SOLDER PAD LAYOUT FOR THICKER SOLDER PAST...

Page 31: ...etail Added H and MP grade references Changed TJMAX to 150 C on the FE and T7 packages Changed specs to TEMP Output Current Absolute Error Modified Block Diagram Modified Paralleling Regulators Circui...

Page 32: ...lable Use Two for a 10A Output IMON Output Current Monitor Stable with Low ESR Ceramic Output Capacitors 15 F Minimum 28 Lead 4mm 5mm QFN Package LT3080 LT3080 1 1 1A Parallelable Low Noise Low Dropou...

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