
3
DEMO MANUAL DC239
NO-DESIGN SWITCHER
OPERATIO
U
to prevent a lock-up condition if C2 droops too low during
start-up. By the time the output nears the regulation point,
the C2 voltage is well above the lower trip point of COMP2
and CP2 will remain enabled. This method of disabling the
output charge pump while an internal boosted gate drive
supply is developed allows the part to start up at low
voltages with a larger output current load than would
otherwise be possible.
Shutdown
Shutdown is implemented using an external pull-down
device on the C1
–
/SHDN pin. The demo circuit provides a
jumper that selects either the ON or SHDN state. In the ON
state, the 100
Ω
external pull-down resistor is left floating.
In the SHDN state, the resistor is shorted to ground
through the jumper. The center pin of the jumper can be
driven with an external, open-drain device to test the AC
start-up and shutdown characteristics. The shutdown
feature can be used to prevent charge pump switching
during noise sensitive intervals. The LTC1502-3.3 takes
between 20
µ
s and 50
µ
s to switch from shutdown to active
mode once the pull-down device has been turned off.
During shutdown, V
OUT
is disconnected from V
IN
.
Short-Circuit Protection
When the output pin is shorted to ground, the LTC1502-
3.3 will continuously charge the C2 capacitor to approxi-
mately 1.4 times V
IN
and then discharge C2 into the
shorted output. Since the discharging of C2 into V
OUT
will
bring the C2 voltage below the COMP2 start-up trip
voltage, the output charge pump will be forced Hi-Z while
C2 charges again. Hence, the internal charge pump gate
drive voltage is limited to 1.4 • V
IN(MAX)
(on the C2 pin),
and no continuous current is supplied to V
OUT
. The result-
ing output short-circuit current is limited to under 30mA
(typ), thereby allowing the LTC1502-3.3 to endure an
indefinite output short circuit without damage. When the
short is removed, the part will start up and operate
normally.
–
+
–
+
–
+
TIMING
CONTROL
BIAS
CONTROL
1.2V
REF
CP2
C3
C1
CP1
SHDN
OSCEN
INTERNAL
V
CC
CLK1/CLK2
U3
U4
U2
C2
V
OUT
HIZ2
HIZ1
1M
1.2M
2.1M
C
OUT
C2
COMP2
COMP3
COMP1
400k
0.55V
+
2.5
µ
A
C1
–
/SHDN
SHUTDOWN
C1
+
C3
–
C3
+
V
IN
3
2
C2
1
6
7
V
OUT
8
V
IN
5
GND
1502-3.3 BD
4
C
IN
LTC1502-3.3 Block Diagram
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.