Linear Technology DC1680A, Demo Manual

Page: 7 / 28

7
dc1840afb
DEMO MANUAL DC1840A
Demonstration circuit 1682a operation
AUTO and MID Jumpers
The AUTO and MID pins of the LTC4271 are set by
jumpers JP1 and JP2 respectively on the DC1682A
(Figure 10). Setting JP1 to HI enables the AUTO pin mode
in the LTC4270/LTC4271 chipset. J2 provides test points
for access to AUTO and MID.
In AUTO pin mode (JP1 high), the LTC4270/LTC4271
chipset internal I
2
C registers default to the AUTO pin high
state after a software or hardware reset, or system power
on. The LTC4270/71 chipset autonomously detects, pow-
ers on and disconnects power to PDs without the need
for I
2
C host control.
Setting JP1 to LO disables AUTO pin mode and sets the
LTC4270/LTC4271 chipset to a low current shutdown
mode. An I
2
C host controller can then be used to con-
figure the LTC4270/LTC4271 chipset to semi-auto mode
for controlled PSE operation or to manual mode for test
purposes.
Setting JP2 to HI enables the midspan mode detection
backoff timer in the LTC4270/LTC4271 chipset. For end-
point PSEs, set JP2 to LO to disable midspan mode.
For quick PSE evaluation in AUTO pin mode with
MIDSPAN disabled, set JP1 HI and JP2 LO on the DC1682A.
S1B Diodes Port Protection
Ethernet ports can be subject to significant ESD events
when long data cables, each potentially charged to thou-
sands of volts, are plugged into the low impedance of the
RJ45 jack. To protect against damage, each port requires
a pair of clamp diodes; one to AGND and one to V
EE
(Figure 11). An additional surge suppressor is required
for each LTC4270 chip from V
EE
to AGND. The diodes at
the ports steer harmful surges into the supply rails, where
they are absorbed by the surge suppressor and the V
EE
bypass capacitance. The surge suppressor has the addi-
tional benefit of protecting the LTC4270 from transients
on the V
EE
supply.
S1B diodes work well as port clamp diodes. The two
S1B diodes per port are a part of the LTC4270/LTC4271
application. These components are not on the DC1682A
due to space constraints but are shown in Figure 11 for
completeness.
In addition to the S1B diodes, a SMAJ58A or equivalent
is recommended for the V
EE
surge suppressor placed
directly across the AGND and V
EE
pins on the LTC4270.
Figure 11. DC1682A, 1 of 12 Ports Outputs. S1B Protection Diodes Located on the DC1680A
34-PIN
CONNECTOR
DC1682A SIDE DC1680A SIDE
DC1840A F11
V
EE
V
EE
V
EE
S1B
S1B
PROTECTION
S1B
VSSK
C19
1µF
100V
D26
B1100
4 × 1.00
Qn
FDMC3612
OUTn
OUTn
TO
PORT
SENSEn
RSENSEn
GATEn OUTn
LTC4270
AGND
D1
SMAJ58A
C26
0.1µF
Cn
0.22µF
X7R
100V
V
EE