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dc1620afb

DEMO MANUAL DC1620A

QUICK START PROCEDURE

Using bandpass filters on the clock and the analog input 
will improve the noise performance by reducing the 
wideband noise power of the signals. In the case of the 
DC1620A a bandpass filter used for the clock should be 
used prior to the DC1075. Data sheet FFT plots are taken 
with 10-pole LC filters made by TTE (Los Angeles, CA) to 
suppress signal generator harmonics, non-harmonically 
related spurs and broadband noise. Low phase noise Agilent 
8644B generators are used with TTE bandpass filters for 
both the clock input and the analog input.

Apply the analog input signal of interest to the SMA con-
nectors on the DC1620A demonstration circuit board 
marked J5 AIN+. These inputs are capacitive coupled to 
Balun transformers ETC1-1-13 (lead free part number: 
MABA007159-000000).

An internally generated conversion clock output is available 
on J1 which could be collected via a logic analyzer, or other 
data collection system if populated with a SAMTEC MEC8-
150 type connector or collected by the DC890 QuikEval™-II 
data acquisition board using PScope™ software.

Software

The DC890 is controlled by the PScope system software 
provided or downloaded from the Linear Technology 
website at http://www.linear.com/software/. If a DC890 
was provided, follow the DC890 Quick Start Guide and 
the instructions below. 

To start the data collection software if “PScope.exe” is 
installed (by default) in \Program Files\LTC\PScope\, double 
click the PScope icon or bring up the run window under 
the start menu and browse to the PScope directory and 
select PScope. 

If the DC1620A demonstration circuit is properly connected 
to the DC890, PScope should automatically detect the 
DC1620A, and configure itself accordingly. If necessary 
the procedure below explains how to manually configure 
PScope.

Under the Configure menu, go to ADC Configuration. Check 
the Config Manually box and use the following configura-
tion options, see Figure 2:

Manual configuration settings:

 Bits: 

16

 Alignment: 

16

  FPGA Ld: DDR LVDS

 Channs: 

2

 Bipolar: 

Unchecked

  Positive-Edge Clk: Checked

If everything is hooked up properly, powered, and a suitable 
convert clock is present, clicking the Collect button will 
result in time and frequency plots displayed in the PScope 
window. Additional information and help for PScope is 
available in the DC890 Quick Start Guide and in the online 
help available within the PScope program itself.

Serial Programming

PScope has the ability to program the DC1620A board 
serially through the DC890. There are several options 
available in the LTC2185 family that are only available 
through serially programming. PScope allows all of these 
features to be tested. 

These options are available by first clicking on the Set 
Demo Bd Options icon on the PScope toolbar (Figure 3).

Figure 2: ADC Configuration

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Summary of Contents for 1620A-A

Page 1: ...circuitry on the analog inputs is optimized for analog input frequencies from 5MHz to 70MHz Refer to the data sheet for proper input networks for different input frequencies Design files for this circuit board are available at http www linear com demo Table 1 DC1620 Variants DC1620 VARIANTS ADC PART NUMBER RESOLUTION MAXIMUM SAMPLE RATE INPUT FREQUENCY 1620A A LTC2185 16 Bit 125Msps 5MHz to 140MHz...

Page 2: ...uick Start Guide to install the required software and for connecting the DC890 to the DC1620A and to a PC DC1620A Demonstration Circuit Board Jumpers The DC1620A demonstration circuit board should have the following jumper settings as default positions as per Figure 1 JP2 PAR SER Selects Parallel or Serial programming mode Default Serial JP3 Duty Cycle Stabilizer Enables Disable Duty Cycle Stabili...

Page 3: ... based on a Gallium Arsenide gain block prior to the final filter This is particularly true at higher frequencies where IC based operational amplifiers may be unable to deliver the combination of low noise figure and high IP3 point required A high order filter can be used prior to this final amplifier and a relatively lower Q filter used between the amplifier and the demo circuit Encode Clock Note...

Page 4: ...ta collection software if PScope exe is installed bydefault in ProgramFiles LTC PScope double click the PScope icon or bring up the run window under the start menu and browse to the PScope directory and select PScope IftheDC1620Ademonstrationcircuitisproperlyconnected to the DC890 PScope should automatically detect the DC1620A and configure itself accordingly If necessary the procedure below expla...

Page 5: ...r current 3 5mA LVDS output driver current 4 0mA LVDS output driver current 4 5mA LVDS output driver current Internal Termination Enables LVDS internal termination Off Default Disables internal termination On Enables internal termination Outputs Enables digital outputs Enabled Default Enables digital outputs Disabled Disables digital outputs Output Mode Selects digital output mode Full Rate Full r...

Page 6: ...ERENCE PART DESCRIPTION MANUFACTURER PART NUMBER 1 1 CN1 CAP ARRAY 0508 2 2μF 20 10V X5R AVX W0508L8ZD225MAT1A 2 7 R47 R48 R53 R54 R78 R79 RES 0402 0Ω JUMPER NIC NRC04Z0TRF 3 11 C1 C2 C3 C6 C7 C13 C57 C61 C65 CAP 0402 0 01μF 10 16V X7R AVX 0402YC103KAT 4 4 C9 C10 C63 C64 CAP 0402 8 2pF 5 50V COG AVX 04025A8R2JAT2A 5 0 C11 C16 CAP 0402 OPTION OPTION 6 9 C12 C15 C18 C21 C37 C66 C67 CAP 0402 0 1μF 10...

Page 7: ... 99k 1 1 16W AAC CR16 4991FM 33 4 R27 R28 R31 R32 RES 0201 OPTION OPTION 34 6 R36 R44 R45 R56 R57 R65 RES 0402 86 6Ω 1 1 16W VISHAY CRCW040286R6FKED 35 4 R39 R40 R67 R70 RES 0402 33 2Ω 1 1 16W VISHAY CRCW040233R2FKED 36 2 R46 R55 RES 0402 100Ω 1 1 16W NIC NRC04F1000TRF 37 5 TP1 TP2 TP3 TP4 TP5 TURRETS MILLMAX 2501 2 00 80 00 00 07 0 38 3 T1 T3 T4 XFMR 1 1 MACOM MABA 007159 000000 39 2 T2 T5 XFMR 1...

Page 8: ...20A SCHEMATIC DIAGRAM Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com ...

Page 9: ... Corporation makes no representa tion that the interconnection of its circuits as described herein will not infringe on existing patent rights SCHEMATIC DIAGRAM Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com Downloaded from Arrow com ...

Page 10: ...Y SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES The user assumes all responsibility and liability for proper and safe handling of the goods Further the user releases LTC from all claims arising from the handling or use of the goods Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with...

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