3. TECHNICAL BRIEF
- 40 -
3.6. Memory
1Gbit Flash & 128Mbit SDRAM employed on KE850 with 16 bit parallel data bus thru ADD(0) ~
ADD(24). The 256Mbit Sibley Wireless Flash memory with LPSDRAM stacked device family offers
multiple high-performance solutions. The Sibley flash die is manufactured on 90 nm process
technology.
It delivers 108 MHz synchronous burst and page-mode read rates with supports multi-partitioning with
Read-While-Write (RWW) or Read-While-Erase (RWE) dual operations. The LPSDRAM is a high-
performance volatile memory operating at speeds up to 104 MHz with configurable burst lengths.
Figure 11 Flash memory & SDRAM MCP circuit diagram
TP202
TP201
C221
0.1u
C222
0.1u
R212
15K
0.1u
C219
TP203
C217
0.1u
1V8_SD
22
R209
C220
0.1u
TP205
E3
_D2_CS
_D_CAS
F3
_D_CLK
H5
_D_RAS
F4
H6
_D_WE
_F1_CE
G3
G2
_F2_CE
H3
_F3_CE
_F4_CE_A27
E6
D5
_F_ADV
G7
_F_RST
_F_WP1
E1
_F_WP2
F1
_OE
H7
_S_CS1
F6
E2
_WE
J3
VCCQ2
J7
VCCQ3
VCCQ4
J8
C2
VSS1
K6
VSS10
VSS11
K7
K8
VSS12
VSS2
C3
C4
VSS3
C6
VSS4
VSS5
C7
C8
VSS6
K2
VSS7
VSS8
K3
K4
VSS9
F2
_D1_CS
D7
D_VCC3
F_CLK
K5
B6
F_DPD
F_VCC1
D4
F_VCC2
D6
F_VCC3
J4
F_VCC4
J6
J1
F_VPP
F_WAIT
J9
D8
N_ALE
E5
N_CLE
N_RY__BY
H1
G1
RFU
H2
S_CS2
S_VCC
D2
VCCQ1
J2
DQ8
M5
DQ9
L6
A1
DU1
A9
DU2
DU3
M1
M9
DU4
D_BA0
G4
H4
D_BA1
G6
D_CKE
J5
D_CLK
H9
D_DM0__S_LB
D_DM1__S_UB
H8
D_LDQS
M3
M7
D_UDQS
D_VCC1
C5
D3
D_VCC2
G8
A8
F8
A9
M2
DQ0
L1
DQ1
M6
DQ10
L7
DQ11
DQ12
L8
DQ13
K9
L9
DQ14
M8
DQ15
DQ2
K1
DQ3
L2
M4
DQ4
L3
DQ5
DQ6
L4
L5
DQ7
B4
A17
A18
B5
A5
A19
A2
B1
A20
F7
A21
E7
A22
B7
A6
A23
A7
A24
A25
A8
B8
A26
B2
A3
A4
A2
B3
A5
A3
A6
A7
A4
U202
PF38F5570MMY0B0
A0
D1
C1
A1
E8
A10
G9
A11
A12
F9
A13
E9
A14
D9
C9
A15
A16
B9
TP207
1V8_SD
TP204
R214
100K
TP206
R207
NA
NA
R208
0
R206
R211
0
0.1u
C218
22
R210
CS_Flash1n
1G_CSn
CS_Flash1n
CS_Flash2n
BC0n
BC1n
ADVn
D2
D3
D4
D5
D6
D7
D8
D9
D10
BFCLKO
SDCLKO
RESETn
BFCLKI
SDCLKI
A16
A17
A18
A19
A20
A21
A22
A23
A24
D0
D1
D11
D12
D13
D14
D15
A0
A1
A10
A11
A12
A13
A14
A15
A2
A3
A4
A5
A6
A7
A8
A9
A13
A14
CKE
F_DPD
WAITn
CS_RAM1n
CASn
RASn
WRn
RDn
Summary of Contents for Prada KE850
Page 1: ...Date March 2007 Issue 1 0 Service Manual Model KE850 Service Manual KE850 ...
Page 3: ... 4 ...
Page 5: ... 6 ...
Page 71: ...4 PCB layout 72 Main PCB bottom Main PCB bottom placement ...
Page 115: ... 116 6 Download S W upgrade 6 Press the START button ...
Page 117: ...6 Download S W upgrade 118 KE850 KE850P40 7 V09a KE850 KE850P40 7 V09a ...
Page 127: ... 128 LGMC 8 pcb layout ...
Page 128: ... 129 LGMC 8 pcb layout ...
Page 129: ... 130 LGMC 8 pcb layout ...
Page 130: ... 131 LGMC 8 pcb layout ...
Page 131: ... 132 8 pcb layout ...
Page 132: ... 133 8 pcb layout ...
Page 133: ... 134 8 pcb layout ...
Page 134: ... 135 8 pcb layout ...
Page 135: ... 136 8 pcb layout ...
Page 136: ... 137 8 pcb layout ...
Page 137: ... 138 ...
Page 149: ... 150 ...
Page 151: ... 152 ...
Page 172: ...Note ...
Page 173: ...Note ...