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Copyright ©
LG Electronics Inc. All rights reserved.
Only for training and service purposes.
BLOCK DIAGRAM
1. Main
Main IC
IF
(+/-)
OPTIC
DDR4 2133X
16
(4Gb X2EA
)
Di
gital
Demod
SY
ST
EM
EEPROM
(256Kb)
41P
51P
eMMC
(8GB)
Mi
co
m
(RENES
AS
R5F100G)
DDR4 2133
X 16
(4Gb X 2E
A)
X_
TA
L
24
MH
z
\(Ma
in
Cl
ock)
M0
M1
VB
Y1
USB
I2
C 4
AV
R E A R
(H)
AM
P
TI
CVBS
/L/R
SPDIF
OU
T
I2
C 1
IR
SUB
ASSY
IR
/K
EY
USB_
WI
FI-B
T
Tuner
: I2
C
5
LA
N
R E
A
R
ET
HERNET
CVBS
/SIF
Tuner
(TDJS-H651F)
CO
MP
USB1 (2
.0)
USB2 (2
.0)
USB3 (2
.0)
OCP
1.5A
OCP
1.5A
R E A R
OCP
1.5A
YP
bPr
KEY
HD
MI
1 (2.1)
HD
MI
2 (2.1)
HD
MI
3
(2.1)
R E A R
(A
RC)
HD
MI
4
(2.1)
HD
MI
Sub Board
I2S
PWM
FA
N1
(F
AN
2)
Audio
AM
P
2
(NTP7515D)
0X56
Audio
AM
P
3
(NTP7515D)
0X54
H/
P
Line-Out
I2
C 0
I2
C 4
AU
D_L
RCH_T
W
AU
D_L
RCH
IC
_RST
M2
DDR4 2133
X
16
(4Gb X 2E
A)
LED
Audio
AM
P
1
(NTP7515D)
0X54
Front
W
oofer
Hei
ght
AU
D_L
RCH
Mi
co
m
for motor
control
(RENESA
S
R5F100G)
Mo
tor
A/
B/
C/
D
PWM
X_
TA
L
32.768KHz
Bl
uetooth/WiFi
Summary of Contents for OLED77W9PUA
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