3-19
5) Audio Test
The resolution is displayed as shown at the below, and when the initial menu is disappeared, you can change
the resolution by selecting the resolution list.
If you select ‘RGB,’ the menu can be displayed at the RGB monitor only, and ‘YPbPr’ at the TV supporting the
YPbPr only. If you connect the output terminal to the TV or monitor not suitable for the resolution, nothing will
be displayed.
Other Audio outputs (Fixed, SPDIF) are muted at the time of Variable Audio output test.
Other Audio outputs (Variable, SPDIF) are muted at the time of Fixed Audio output test.
Other Audio outputs (Fixed, Variable) are muted at the time of SPDIF Audio output test.
Audio Volume Up/Down is operated by the Volume Up/Down key of the remote controller.
A broadcasting signal entered at the ANT or the data stored at the HDD can be used as the audio source.
6) External Audio/Video Input Test
The test should be done by connecting with the audio/video external input.
You should use the line level stereo as an audio source and the NTSC signal as an video source.
< Fig7 > Resolution Test Menu
< Fig8 > External Audio/Video Input Test
Summary of Contents for LST-3410A
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Page 64: ...3 41 3 42 WAVEFORMS 1 SYSTEM PART 1 1 1 2 2 System Reset System Main Clock 33 333MHz ...
Page 71: ...3 55 3 56 8 PVR PART 1 2 1 Variable Audio_L Out SPDIF Out Signal ...
Page 72: ...3 57 3 58 9 PVR PART 2 1 2 BCM7040 Memory Clock BCM7040 Clock ...
Page 75: ...3 63 3 64 12 1394 PART 1 2 1394 TP Out Clock 1394 X Tal Clock ...
Page 77: ......
Page 79: ...3 72 3 73 2 CPU CIRCUIT DIAGRAM 1 SMEM_DATA S_MEM ADR PER_DATA PER_ADDR CPU CLOCK ...
Page 80: ...3 74 3 75 3 BOOT STRAPPING CLOCK CPLD CIRCUIT DIAGRAM PER DATA PER ADR TO CPU P8 P9 P4 ...
Page 82: ...3 78 3 79 5 HD II CIRCUIT DIAGRAM PES CLOCK PER ADDR PER DATA Valid TP DATA CLK ...
Page 84: ...3 82 3 83 7 AUDIO PROCESSOR SPDIF OUT CIRCUIT DIAGRAM ...
Page 85: ...3 84 3 85 8 NTSC DECODER DVI OUTPUT CIRCUIT DIAGRAM ...
Page 86: ...3 86 3 87 9 TPN II MEMORY CIRCUIT DIAGRAM ...
Page 87: ...3 88 3 89 10 MPEG ENCODER MEMORY CIRCUIT DIAGRAM ...
Page 88: ...3 90 3 91 11 PCI2IDE CONTROLLER CIRCUIT DIAGRAM ...
Page 89: ...3 92 3 93 12 ATSC QAM NTSC NIM TUNER CIRCUIT DIAGRAM ...
Page 90: ...3 94 3 95 13 AUDIO VIDEO OUT CIRCUIT DIAGRAM ...
Page 91: ...3 96 3 97 14 1394 CIRCUIT DIAGRAM ...
Page 92: ...3 98 3 99 15 MICOM POWER I F FRONT I F CIRCUIT DIAGRAM ...
Page 93: ...3 100 3 101 16 FRONT CIRCUIT DIAGRAM ...
Page 94: ...3 102 3 103 17 GEMSTAR CONTROLLER CIRCUIT DIAGRAM ...
Page 95: ...3 104 3 105 18 GEMSTAR MEMORY CIRCUIT DIAGRAM ...
Page 96: ...3 106 3 107 19 GEMSTAR MICOM I F CIRCUIT DIAGRAM ...
Page 97: ...3 108 3 109 PRINTED CIRCUIT DIAGRAMS 1 DIGITAL MAIN PRINTED CIRCUIT DIAGRAMS TOP ...
Page 98: ...3 110 3 111 2 DIGITAL MAIN PRINTED CIRCUIT DIAGRAMS BOTTOM LOCATION GUIDE ...
Page 99: ...3 112 3 113 3 SMPS POWER PRINTED CIRCUIT DIAGRAM LOCATION GUIDE ...
Page 100: ...3 114 3 115 5 GEMSTAR PRINTED CIRCUIT DIAGRAM BOTTOM 4 GEMSTAR PRINTED CIRCUIT DIAGRAM TOP ...
Page 101: ...3 116 3 117 6 KEY PRINTED CIRCUIT DIAGRAM 7 TIMER PRINTED CIRCUIT DIAGRAM LOCATION GUIDE ...
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