LG LH-T6740, Service Manual

Page: 46 / 57

- 3-21 -
❏
BLOCK DIAGRAM
1. Overall Block Diagram
M
M
DISC
SP
INDLE
MOT
O
R
LOADING
MO
T
O
R
DECK ME CHAN IS M
D
V
D :
A,
B,
C,D,RF0
CD :
A,
B,C,
D,
E,F,RF0
CDMDI,D
V
DMDI
PIC
K
UP
KEY In
put
6MHz
B/
Pb
IC6
0
2
M
X
29
LV160
T
2/4
M
16/32
B
IT
FLASH R
O
M
M-RES ET
ROMAD[0:
19]
ROMRD
ROMWR
MD[00:15]
FL FR
CVBS
R/
Pr
G/Y
RL RR
CE
N
T
E
R
WO
O
F
ER
TV_DAC[0:3]
Y C
FL FR
RL RR
CE
N
T
E
R
WO
O
F
ER
VF
+
AC
90V~
240V
50H
Z/60H
z
VF
-
-2
7
V
A
5V
VD
3
3
,V
D
3
3
D
12V
27MHz
PWR
C
T
L
3.3V-
M1
IC6
0
6
KS2
4C
0
2
EE
PRO
M
IC701~4 DIGITAL
POWER IC
RC
90
1
R/C
IC903
R
ESET
IC
LOAD[+,-]
FOCUS[+,-]
TR ACK[+,- ]
SPIN DL E[+ ,-]
SLED
(FEEDING)
MO
T
O
R
SLE D[+,-]
M
VD33
D
VD33
D
VD
18/VD33
3V3M
IC605
MM162
3
XFBE
VIDEO BUFFER
R
S
232_T
XD
IECD AOUT
COAX
IA
L
SPD
IF
D2_T
[1
:3
]
SC
AR
T_
1
6
:9
RGB_
S
E
L
3V3M
CDLD,D
V
D
LD,
S
V
R
EF21
5V/8V
H
O
M
ESW
IN
S
W
,O
UTS
W
ROMDAT A[0:7]
5.2VA
IC
101
AUDIO MICOM
M_REQ
POW
ER
BOARD
VFD_R XD
S_R EQ
5.2V
A
8V
DMUTE
IIC/VFD/D
A
C
_
S
C
K
IC
603
4M
16
B
IT
4B
an
k
SDRAM
VD33
D
MA[00:11]
DMCL
K
CS
J
BA
0
BA
1
DQM
WE
J
CA
S
J
RA
S
J
IIC/VFD/D
A
C
_TXD
IC601
MTK MT
1389
+12V
+
12V
5V
YC_ MIX
VI
D
E
O
_
S
W
S
E
R[0:2],D
AC_ML1
OPEN
,C
L
O
SE
,S
LE
G
P
,SP
IN
D
L
E
,FOC
US
,T
R
ACK
,SVRE
F
DAC_
R
S
T
CD_DV D, VR_ CD,V R_DV D CD_DV D_CT
XS
FGN,
XS
FGP
CN6
0
1
R
S
232
Downlo
a
d
RS 232_RXD
3.3V 3.3V-
M
U7
VD
1
8
IC
301
PS9818
(PWM IC)
IC2
0
1
IP
4504
Motor Dri
v
e
DR
V
S
B
OPU_SE L
JACK
TRIGGE
R
-27VA
/VF+
/V
F-
DIG901
FLD DISPLAY
Pick-up
RF+ MPEG IC