3.10.5 Camera Interface
KF700 Installed a 3M Pixel and 0.3Mega Camera. Below [Fig. 3.18] shows the camera board to board
connector and camera I/F signal.
The MEGA Camera module is connected to Main PCB with 20pin Board to Board connector Its
interface is dedicated camera interface port in ISP chip. The camera port supply 24.576MHz master
clock to camera module, vertical sync signal, horizontal sync signal, reset signal and 8bits data from
camera module. The camera module is controlled by I2C port from ISP chip.
The VGA Camera module is connected to FPCB with 20pin Board to Board connector (AXK720147G).
Its interface is dedicated camera interface port in MSM6280. The camera port supply 24.576MHz
master clock to camera module and receive 24.576MHz pixel clock (30fps), vertical sync signal,
horizontal sync signal, reset signal and 8bits data from camera module. The camera module is
controlled by I2C port from MSM6280.
LGE Internal Use Only
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
- 55 -
LC Filter for power noise from GSM RF
PG05DBTFC
D500
FB506
FB505
0.1u
C512
17
18
19
2
20
3
4
5
6
7
8
9
G1
G2
G3
G4
1
10
11
12
13
14
15
16
AXK7L20227G
CN500
FB503
BLM15AG100PN1
FB502
C514
2.2u
220p
C519
VREG_3M_AF_2.8V
L500
47nH
C513
0.1u
VREG_CAM_2.8V
VREG_CAM_1.8V
ISP_SENS_I2C_SDA
ISP_SENS_MCLK
CLKN
CLKP
DATAN
DATAP
XSHUTDOWN
ISP_SENS_I2C_SCL
[Fig. 3.18] Camera PCB Board to Board Connector
C101
0.1u
FB100
FB101
VREG_CAM_2.8V
C100
0.1u
6
7
8
9
1
10
11
12
13
14
15
16
17
18
19
2
20
3
4
5
CN101
VREG_CAM_1.8V
CAM_DATA(5)
CAM_DATA(6)
CAM_DATA(7)
CAM_VSYNC
I2C_SDA
I2C_SCL
VGA_CAM_RESET_N
CAM_MCLK
CAM_DATA(0)
CAM_DATA(1)
CAM_DATA(2)
CAM_DATA(3)
CAM_DATA(4)
VGA_CAM_PWDN
CAM_PCLK
CAM_HSYNC
Summary of Contents for KF700
Page 1: ...Service Manual Model KF700 Service Manual KF700 Date May 2008 Issue 1 1 Internal Use Only ...
Page 193: ...Note ...
Page 194: ...Note ...