LG FLATRON L2323T, Service Manual

Page: 43 / 70

PIN CONFIGURATION
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S524A40X10/40X20/40X40
S524A40X10/
40X20/40X40
V
CC
WP SCL SDA
A0 A1 A2 V
SS
NOTE: The S524A40X10/40X20/40X40 is available
in 8-pin DIP, SOP, and TSSOP package.
Figure 2-2. Pin Assignment Diagram
Table 2-1. S524A40X10/40X20/40X40 Pin Descriptions
Name Type Description
Circuit
Type
A0, A1, A2 Input Input pins for device address selection. To configure a device address,
these pins should be connected to the V
CC
or V
SS
of the device.
These pins are internally pulled down to V
SS
.
1
V
SS
— Ground pin. —
SDA I/O Bi-directional data pin for the I
2
C-bus serial data interface. Schmitt
trigger input and open-drain output. An external pull-up resistor must
be connected to V
CC.
Typical values for this pull-up resistor are 4.7 k
(100 kHz) and 1 k (400 kHz).
3
SCL Input Schmitt trigger input pin for serial clock input. 2
WP Input
Input pin for hardware write protection control. If you tie this pin to V
CC,
the write function is disabled to protect previously written data in the
entire memory; if you tie it to V
SS
, the write function is enabled.
This pin is internally pulled down to V
SS
.
1
V
CC
— Single power supply. —
NOTE: See the following page for diagrams of pin circuit types 1, 2, and 3.
http://www.wjel.net