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3-18
2
4
3
RESET
RESET1
GND
DVCC3
C99
2.2uF/10V/Y5V
C99
2.2uF/10V/Y5V
TP17
TP17
R128
1K
R128
1K
R56
27K
R56
27K
C41
0.1uF/25V/Y5V
C41
0.1uF/25V/Y5V
DETAILS AND WAVEFORMS ON SYSTEM TEST AND DEBUGGING
1. SYSTEM 27MHz CLOCK, RESET, FLASH R/W SIGNAL
1) SPHE8202RQ-D main clock is at 27MHz (Y2)
FIG 1-1
1
2) SPHE8202RQ-D reset is active high.
3.3V
POCN
RESET
FIG 1-2
2
3
4
1
CLKOUT
CLKIN
GND
Y2
27MHz/30PPM
Y2
27MHz/30PPM
R25
75
R25
75
C22
33pF/50V/NP0
C22
33pF/50V/NP0
R26
100K
R26
100K
C21
33pF/50V/NP0
C21
33pF/50V/NP0