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LG Electronics Inc. All rights reserved.
Only for training and service purposes.
BLOCK DIAGRAM
OCP 1.5A
Audio 2
AM
P
MainSOC
IF
(+/-)
USB1 (3
.0)
OPTIC
LA
N
DDR3 2133
X
16
(512
MB
X 2E
A)
HD
MI
1
(2.0)
HD
MI
2
(2.0)
HDM
I3
(2.0)
SY
ST
EM
EEPROM
(256Kb)
USB2 (2
.0)
USB3 (2
.0)
eM
MC
(4GB)
Sub
Mi
co
m
DDR3
2133
X 16
(512M
B
X 2E
A)
P_
TS
X_
TA
L
24M
Hz
I2S
Out
H/
P
AV
D-De
mod
: I2
C
2
R E A R
S I D E
R E A R (H)
HP
AM
P
SPDIF
OU
T
BLUTOOTH
IR
/
KEY/
EY
E
WI
FI
SUB ASSY
IR
KEY
Tuner
: I2
C
5
I2
C
CVBS
/SIF
Tuner
CO
MP
(A
RC)
X_
TA
L
32.768kH
z
OCP 1.5A
OCP 1.5A
Com
ponent
Spec
Out
HD
MI
4
(2.0)
Apply only CI Slot model
1. SOC
Summary of Contents for 65SJ8500
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