- 10 -
Copyright ©
LG Electronics Inc. All rights reserved.
Only for training and service purposes.
BLOCK DIAGRAM
Ma
in
IC
eMMC
(8
GB
)
CI
Sl
ot
USB1
(2
.0)
OC
P
USB2
(2
.0)
HDMI3(2.0)
HDMI2(ARC)
HDMI
1(
2.0)
Air/ Cabl
e
TUNE
R
(T
2/C/
A)
TUNE
R
(S,S
2)
DV
B-
S
LN
B
T2/C/S/S2 H
H
-
-
NIM tune
r
IF
(+
/-
)
P_TS_OUT
P_TS_I
N
MICO
M
IR
/ KE
Y
USB_WIFI
X_TA
L
27MHz
Sub Assy
LA
N
ETHERNET
SPDIF
AV/COMP
CVBS/Y
PbPr
SPDIF OU
T
H/P
AMP
RS-232
MAX323
MAIN
Audio
AM
P
I2S Ou
t
I2C
0
Vx1
51P
(8
lane
)
Vx1
/ EPI/
CEDS
FCIC
SPI/
I2C
3
Main PMIC
IF_S
IF
GST/MCL
K/GC
LK
/EO/I2C
6
NVRAM
(256
Kb
)
I2C_
5
I2C
1/2
EPI
bloc
k
IQ (+
/-
),
IP(+/
-)
HDMI4(2.0)
(depend
on mode
l)
TS
EPI
60P
(6
5”
:8
lane,
55”
↓:
6lane),
CEDS 68P
Area
OP
T
USB_WIFI
1.5V DDR
0.96
V
Core&C
P
U
3.3V Normal
1.0V Et
h
3.5V ST
_B
Y
1.8V
5V
Normal
Su
b
PMIC
0.
96
V
1.
5V
3.
3V
5V
1V
1.
8V
3.
5V
_S
T
0.
95
V
1.
5V
3.
3V
13
V
3.
3V
5V
5V
1V
1.
8V
1.
8V
3.
5V
_S
T
3.
5V
_S
T
3.
3V
3.
5V
_S
T
3.
5V
_S
T
13
V
3.
5V
_S
T
13
V
3.
5V
_S
T
13
V
3.
3V
13
V
13
V
3.
3V
13
V(
PA
NE
L_
VC
C)
13
V(
PA
NE
L_
VC
C)
To
Pa
ne
l
Fr
om
Po
we
r
B/
D
13
V
Signal
flow
Su
pp
lie
d
Vo
lta
ge
In
/o
ut
pu
t V
ol
ta
ge
To
W
IF
I/B
T
Co
m
bo
eMMC
CLK/DATA/STR
B
48bit
DDR3
2133
x1
6
(512MB
X
3EA)
I2C
2
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