LG 55LH80YD, Service Manual

Page: 37 / 66

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDR_DQ[3]
URSA_A[9]
DDR_DQ[15]
URSA_DQ[20]
DDR_DQ[6]
DDR_DQ[22]
DDR_DQ[12]
DDR_DQ[28]
DDRA_A[6]
DDR_DQ[25]
DDRB_A[1]
URSA_DQ[31]
DDR_DQ[15]
DDR_DQ[26]
DDRB_A[11]
DDR_DQ[19]
DDRA_A[9]
DDR_DQ[1]
DDR_DQ[10]
URSA_DQ[22]
DDRB_A[0-12]
DDRB_A[6]
DDR_DQ[13]
URSA_DQ[8]
URSA_DQ[18]
DDRA_A[3]
URSA_DQ[30]
DDR_DQ[11]
URSA_DQ[25]
DDR_DQ[17]
URSA_DQ[12]
DDR_DQ[23]
DDRA_A[4]
DDR_DQ[14]
DDR_DQ[20]
URSA_A[3]
DDRB_A[10]
DDR_DQ[3]
URSA_DQ[17]
DDRB_A[11]
DDRA_A[7]
DDRB_A[5]
DDRA_A[0]
URSA_DQ[9]
DDRA_A[0-12]
DDR_DQ[31]
URSA_A[4]
DDR_DQ[20]
DDRA_A[6]
URSA_A[8]
DDRB_A[0]
URSA_DQ[16]
URSA_DQ[13]
URSA_A[1]
URSA_A[5]
URSA_DQ[23]
URSA_A[10]
DDR_DQ[5]
DDRA_A[4]
DDR_DQ[19]
DDR_DQ[7]
DDRA_A[5]
DDRB_A[1]
URSA_DQ[1]
DDR_DQ[2]
URSA_A[6]
DDR_DQ[23]
DDR_DQ[0-15]
DDRA_A[12]
URSA_A[11]
URSA_A[8]
DDR_DQ[26]
DDR_DQ[22]
URSA_A[1]
URSA_DQ[4]
URSA_DQ[26]
URSA_DQ[7]
DDRB_A[7]
DDRB_A[9]
DDR_DQ[29]
DDR_DQ[17]
URSA_DQ[14]
URSA_A[6]
DDR_DQ[30]
DDR_DQ[27]
URSA_DQ[6]
DDRA_A[5]
DDRA_A[1]
DDR_DQ[21] DDR_DQ[4]
DDRA_A[12]
DDR_DQ[14]
DDR_DQ[0]
DDR_DQ[27]
DDRA_A[0]
DDRA_A[3]
DDRB_A[6]
URSA_A[2]
DDR_DQ[16]
DDR_DQ[24]
URSA_A[7]
DDRA_A[2]
URSA_DQ[10]
URSA_DQ[24]
DDR_DQ[31]
URSA_DQ[27]
DDRB_A[7]
DDR_DQ[13]
DDR_DQ[4]
URSA_A[12]
URSA_DQ[11]
DDRB_A[2]
DDR_DQ[24]
URSA_A[3]
URSA_DQ[5]
DDRB_A[10]
DDRA_A[11]
DDRB_A[8]
DDR_DQ[11]
URSA_A[4]
DDR_DQ[21]
URSA_A[0]
URSA_DQ[0]
DDR_DQ[7]
DDR_DQ[12] DDRB_A[5]
DDR_DQ[1]
DDR_DQ[9]
DDR_DQ[30]
URSA_DQ[21]
URSA_A[5]
DDR_DQ[16]
DDR_DQ[29]
URSA_DQ[2]
URSA_DQ[28]
URSA_DQ[3]
DDRB_A[12]
URSA_A[7]
DDR_DQ[5]
DDRA_A[10]
DDR_DQ[18]
DDR_DQ[9]
DDRB_A[3]
DDRB_A[2]
URSA_DQ[15]
DDR_DQ[0]
URSA_DQ[29]
DDRB_A[0]
DDR_DQ[8]
DDRA_A[8]
DDR_DQ[2]
URSA_A[12]
DDRA_A[10]
DDRA_A[11]
DDRB_A[4]
DDRB_A[3]
DDRA_A[2]
URSA_DQ[19]
DDRA_A[9]
DDR_DQ[8]
DDR_DQ[25]
DDRA_A[1]
DDR_DQ[18]
URSA_A[2]
DDR_DQ[16-31]
DDRB_A[4]
URSA_A[9]
DDR_DQ[28]
DDRA_A[8]
DDRA_A[7]
URSA_A[11]
DDRB_A[12]
DDRB_A[9]
DDRB_A[8]
URSA_A[10]
DDR_DQ[10] URSA_A[0]
DDR_DQ[6]
C837
0.1uF
URSA_MCLKE
7:T4;T8
+1.8V_FRC_DDR
C805
0.1uF
R818 56
C827
0.1uF
R802
1K
1%
C809
0.1uF
URSA_BA0 7:R4;U10
URSA_DQS3
7:I13
A_URSA_CASZ
X15
URSA_RASZ
+1.8V_MEMC
URSA_RASZ
AR816
56
URSA_MCLK
7:I11
R811 56
C818
0.1uF
B_URSA_BA0
AR804
22
URSA_DQS2
7:I14
A_URSA_CASZ
C838
0.1uF
A_URSA_WEZ
U8
A_URSA_BA0
AA15
C824
0.1uF
AR811
22
C807
0.1uF
C831
0.1uF
R807 56
C808
1000pF
C802 10uF
R816 56
R822 1K
1%
AR808
22
L800
BLM18PG121SN1D
AR802
56
URSA_A[0-12]
R804 22
URSA_ODT
7:I10;Q13
C836
0.1uF
+1.8V_FRC_DDR
R823
150 OPT
AR814
56
+1.8V_FRC_DDR
AR800
56
C819
0.1uF
A_URSA_RASZ
R810 56
B_URSA_BA0
AR817
56
URSA_BA1
7:R4;U10
+1.8V_FRC_DDR +1.8V_FRC_DDR
C829
0.1uF
A_URSA_BA1
URSA_DQ[0-31] 7:AB4;AL20
URSA_CASZ
C825
0.1uF
URSA_DQM1
7:W4
URSA_DQS1
7:Y4
C813 10uF
R819 56
R815 56
A_URSA_MCLKE U8
URSA_MCLKZ1
7:AB4
R806 56
URSA_ODT
7:I10;X13
R801 1K
1%
C801
10uF
10V
C832
1000pF
R805 22
URSA_CASZ
C835
0.1uF
URSA_BA0
7:R4;T9
URSA_DQSB3
7:I13
C812
0.1uF
C810 0.1uF
C800
0.1uF
C823 10uF
B_URSA_MCLKE
T9
B_URSA_BA1
AR812
22
R803 22
AR807
22
AR813
22
C820
0.1uF
B_URSA_CASZ
R15
C815
0.1uF
B_URSA_WEZ
Q12
AR810
22
AR815
56
C839
0.1uF
B_URSA_RASZ
R15
C841
0.1uF
R820 56
R813 22
URSA_WEZ
7:R4;T8
C816
0.1uF
URSA_DQM2
7:I15
+1.8V_FRC_DDR
AR809
22
B_URSA_RASZ
C806
0.1uF
C826
0.1uF
AR801
56
URSA_MCLKE 7:T4;U9
R812 22
A_URSA_BA0
URSA_DQSB2
7:I14
URSA_DQM3
7:I15
C840
0.1uF
C834
0.1uF
A_URSA_RASZ
X15
URSA_DQ[0-31] 7:AB4;D20
B_URSA_WEZ
T9
C833
0.1uF
A_URSA_BA1
AA15
C814
0.1uF
URSA_MCLKZ
7:I10
C821
0.1uF
C817
0.1uF
R800
150
OPT
R808 56
B_URSA_CASZ
AR806
22
B_URSA_BA1
URSA_DQS0
7:X4
C822
10uF
10V
C804
0.1uF
C803
0.1uF
B_URSA_MCLKE Q14
URSA_WEZ 7:R4;U9
URSA_MCLK1
7:AA4
R814 22
R817 56
C811
0.1uF
R821 1K
1%
R809 56
+1.8V_FRC_DDR
URSA_DQSB0
7:X4
A_URSA_MCLKE
Z14
AR803
56
C828 10uF
URSA_BA1 7:R4;T8
C830 0.1uF
URSA_DQM0
7:W4
URSA_DQSB1
7:Y4
AR805
22
A_URSA_WEZ
X12
C844 0.1uF C842 0.1uF C843 0.1uF
+1.8V_FRC_DDR +1.8V_FRC_DDR
C850
0.1uF
C848
0.1uF C852 0.1uF
C845
0.1uF
+1.8V_FRC_DDR
C846
0.1uF
C851
0.1uF
+1.8V_MEMC
C849
0.1uF
C847
0.1uF
IC801
H5PS5162FFR-S6C
EAN55705501
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
IC800
H5PS5162FFR-S6C
EAN55705501
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
MST7323S DDR2
8 12
MSTAR (JUNO)
DDR2 1.8V By CAP - Place these Caps near Memory
PI Result
FRC DDR2
HONG YEON HYUK
09.02.04
resonance Compensation
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only