LG 50PK550, Service Manual

Page: 26 / 81

WIRELESS_DL_RX
WIRELESS_DL_TX
D3.3V
BCM_AVC_DEBUG_TX1
D3.3V
NAND_DATA[0-7]
D3.3V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
NAND_ALE
BCM_AVC_DEBUG_RX1
NAND_CLE
2.7K
R63
2.7K
R41
2.7K
READY
R39
2.7K
READY
R57
2.7K
READY
R56
2.7K
READY
R40
2.7K
R45
READY
2.7K
R42
2.7K
R44
2.7K
READY
R43
0
.1
u
F
C
10
0.1uF C13
NAND_CLE
NAND_RB
D3.3V
NAND_DATA[0-7]
NAND_ALE
NAND_CE
D3.3V
NAND_RE
10uF 6.3V
C12
D3.3V
NAND_WE
4.7K R14
0 R23
SKHMPWE010
SW10
1
2 4
3
5
10
K
R
22
SYS_RESET
0
READY
R19
D3.3V
D3.3V
KIA7029AF
IC103
2
G
3 O 1
I
D3.3V
10
K
R
17
R
EA
D
Y
SOC_RESET
SUB_SDA
0
R
11
7
10
K
R
10
4
+3.3V_NEC_ST
EDID_WP
N
E
C
_I
SP
_R
X
D
N
EC
_R
X
D
0.1uF
16V
C21
100K
R156
RL_ON
UPD78F0513AGA-GAM-AX
IC701
1
P60/SCL0
2
P61/SDA0
3
P62/EXSCL0
4
P63
5
P33/TI51/TO51/INTP4
6
P75
7
P74
8
P73/KR3
9
P72/KR2
10
P71/KR1
11
P70/KR0
12
P32/INTP3/OCD1B
1
3
P
31
/I
N
T
P
2/
O
C
D
1A
1
4
P
3
0
/I
N
T
P
1
1
5
P
1
7
/T
I5
0
/T
O
5
0
1
6
P
1
6
/T
O
H
1
/I
N
T
P
5
1
7
P
15
/T
O
H
0
1
8
P
14
/R
X
D
6
1
9
P
13
/T
X
D
6
2
0
P
1
2
/S
O
1
0
2
1
P
11
/S
L
10
/R
X
D
0
2
2
P
10
/S
C
K
10
/T
X
D
0
2
3
A
V
R
EF
2
4
A
V
SS
25
ANI7/P27
26
ANI6/P26
27
ANI5/P25
28
ANI4/P24
29
ANI3/P23
30
ANI2/P22
31
ANI1/P21
32
P20/ANI0
33
P130
34
P01/TI010/TO00
35
P00/TI000
36
P140/PCL/INTP6
3
7
P
1
2
0
/I
N
T
P
0
/E
X
L
V
I
3
8
P
4
1
3
9
P
4
0
4
0
R
E
SE
T
4
1
P
12
4/
X
T
2/
E
X
C
L
K
S
4
2
P
1
2
3
/X
T
1
4
3
FL
M
D
0
4
4
P
12
2/
X
2/
E
X
C
L
K
/O
C
D
0B
4
5
P
12
1/
X
1/
O
C
D
0A
4
6
R
EG
C
4
7
V
SS
4
8
V
D
D
22 R109
0
.1
u
F
C
19
5V_ON
0
R
11
9
KEY1
+3.3V_NEC_ST
+3.3V_NEC_ST
0.1uF
16V
C24
FLMD0
FLMD0001:F5;001:H5
A
C
_D
E
T
MODEL1_OPT_2
10K R161
0
R111
RESET_NEC
001:F4
L
E
D
_R
E
D
2
2
96
1
R
MODEL1_OPT_0
2
2
37
1
R
L
E
D
_B
R
E
A
T
H
IN
G
2
2
07
1
R
1.2V_1.8V_EN
4.7K
R112
22
R116
1/
10
W
K7
4
5%
38
R
OCD1B
0 R166
N
E
C
_I
SP
_T
X
D
22 R163
4.7K
R113
22
R115
10K
R82
0 R168
10
K
R
10
7
32.768KHz
X11
TXC
0.1uF
C20
ERROR_DET
KEY1
N
EC
_T
X
D
22 R162
OCD1B
MODEL1_OPT_3
IR
_N
E
C
0
R
17
1
LED_WHITE
0 R110
RESET_NEC
0 R160
SOC_RESET
NEC_ISP_RXD
0 R114
0
R
12
0
2
2
27
1
R
0 R167
H
D
M
I_
C
E
C
MODEL1_OPT_1
SUB_SCL
KEY2
+3.3V_NEC_ST
NEC_ISP_TXD
+3.3V_NEC_ST
W
IR
E
L
E
SS
_P
W
R
_E
N
22
R108
D3.3V
FLMD0
12505WS-12A00
P11
1
2
3
4
5
6
7
8
9
10
11
12
13
T
C
E
T
E
D_
SS
E
L
E
RI
W
10
K
P
K
50
/P
K
90
R
32
10
K
P
K
50
/P
K
70
R
38
100 R29
MODEL1_OPT_2
10
K
P
K
90
R
37
10
K
R
EA
D
Y
R
35
DISP_EN
AMP_RESET_N
+3.3V_NEC_ST
MODEL1_OPT_1
MODEL1_OPT_0
10
K
R
EA
D
Y
R
34
MODEL1_OPT_3
10
K
P
K
70
R
31
100 R30
10
K
R
EA
D
Y
R
36
10
K
R
EA
D
Y
R
33
10K
R26
NEC_ISP_RXD
OCD1B
10K R25
10K R28
NEC_ISP_TXD
+3.3V_NEC_ST
10K R27
D3.3V
SIDEAV_DET
FE_TS_VAL
TUNER_RESET
MODEL_OPT_5
MODEL_OPT_1
BCM_TX
MODEL_OPT_3
AUD_MASTER_CLK
SDA3_3.3V
DDC_SCL
22
R138
SCL1_3.3V
NAND_DATA[0-7]
SCL0_3.3V
NAND_CE
DDC_SDA
D3.3V
22
R102
100 R130
NAND_ALE
/RST_HUB
NAND_WE
BCM_AVC_DEBUG_TX1
100 R129
SDA2_3.3V
0
R136
RF_BOOSTER
SDA1_3.3V
22 R103
BT_RESET
SCL2_3.3V
0
R132
COMP1_SW
D3.3V
SCL3_3.3V
22
R84
DSUB_DET
EPHY_LINK
22
R89
NAND_RE
NAND_RB
NAND_CLE
EPHY_ACTIVE_Y
100
R92
MODEL_OPT_2
MODEL_OPT_0
SDA0_3.3V
22 R121
33
R78
BCM_RX
MODEL_OPT_4
BCM_AVC_DEBUG_RX1
10MHz
X10
12pF
C18
12pF
C17
1K
R
74
1K
R
EA
D
Y
R
70
1K
R
EA
D
Y
R
73
100 R53
D3.3V
MODEL_OPT_1
1K
R
64
MODEL_OPT_4
100 R55
MODEL_OPT_2
1K
R
EA
D
Y
R
59
1K
R
65
100 R54
MODEL_OPT_3
1K
R
68
1K
R
EA
D
Y
R
71
1K
R
66
MODEL_OPT_5
BT_ON/OFF
1K
R
EA
D
Y
R
60
1K
R
72
R
EA
D
Y
1K
R
69
100 R67
MODEL_OPT_0
OCD1A
OCD1A
O
C
D
1A
10K
R81
WIRELESS_DL_TX
WIRELESS_DL_RX
0
READY
R13
VREG_CTR
S
D
A
1_
3.
3V
S
C
L
1_
3.
3V
RESET
SCL3_3.3V
SDA3_3.3V
2.7K
R49 READY
2.7K
R46
2.7K
R47
2.7K
R50
READY
2.7K
R62
2.7K
R61
2.7K
R48
2.7K
R51
2.7K
R52
READY
10
K
R
12
2
.2
K
R
15
3
2
.2
K
R
15
2
4
.7
K
R
15
1 RE
A
D
Y
4
.7
K
R
15
0 R
EA
D
Y
4
.7
K
R
14
9
4
.7
K
R
14
8
12505WS-06A00
P10
1
2
3
4
5
6
7
MOD_ROM_TX
MOD_ROM_RX
0 R134
0
R133
2
.7
K
R
10
2.7K
R77
2
.7
K
R
80
2
.7
K
R
79
2
.7
K
R
11
22uF
16V
C11
0.1uF
16V
C15
0
READY
R24
4.7K
READY
R175
4.7K
READY R174
0
R124
0 R137
0 R123
2.7K
READY
R58
9
1
0
R
18
330
R15
WATCH_DOG_RESET
COMP2_SW
COMPOSITE1_SW
4
.7
K
R
15
5
4
.7
K
R
15
4
3K R
15
7
1
0
0
R
11
8
100 R164
0 R165
RF_SWITCH_CTL
HDMI_HPD_4 008:R29
+3.3V_EN
0 R176
0
R177
10 R20
10 R21
HDMI_HPD_1
008:H29
HDMI_HPD_3 008:H10
HDMI_HPD_2
008:H20
1K R122
1K R125
1K
R127
1K
R95
HDMI_POWER_1
HDMI_POWER_2
HDMI_POWER_3
HDMI_POWER_4
FLASH_WP
KRC103S
Q10
FLASH_WP
E
B
C
FLASH_WP
0
R131
0
R91
0
R90
0
R87 READY
0 R94
0 R86
0
R88
0
R96
0
R97
0
R98
0
R139
100
R147
0 R178
100 R179
NAND04GW3B2DN6E
IC500
26
NC_17
27
NC_18
28
NC_19
29
I/O0
30
I/O1
31
I/O2
32
I/O3
33
NC_20
34
NC_21
35
NC_22
36
VSS_2
37
VDD_2
38
NC_23
39
NC_24
40
NC_25
41
I/O4
42
I/O5
43
I/O6
44
I/O7
45
NC_26
46
NC_27
47
NC_28
48
NC_29
17
AL
3
NC_3
6
NC_6
16
CL
15
NC_10
14
NC_9
13
VSS_1
12
VDD_1
11
NC_8
10
NC_7
9
E
8
R
7
RB
4
NC_4
5
NC_5
25
NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
W
DEMOD_RESET
0
R180
0
R181
120K
R158 1%
1/16W
10
0K
R
15
9
1% 1/
16
W
22pF
50V
C22
TXC
27pF
50V
C23
TXC
0.1uF
C25
1/8W
4.7M
5%
R182
LGE3556C (C0 VERSION)
IC100
GPIO_00
N26
GPIO_01
L26
GPIO_02
N25
GPIO_03
L25
GPIO_04
K27
GPIO_05
K28
GPIO_06
K24
GPIO_07
K26
GPIO_08
K25
GPIO_09
AA27
GPIO_10
AA28
GPIO_11
AA26
GPIO_12
L1
GPIO_13
L3
GPIO_14
L2
GPIO_15
Y25
GPIO_16
Y26
GPIO_17
M27
GPIO_18
AA25
GPIO_19
R25
GPIO_20
N28
GPIO_21
N27
GPIO_22
AH18
GPIO_23
P23
GPIO_24
M23
GPIO_25
AD19
GPIO_26
AE19
GPIO_27
M4
GPIO_28
M5
GPIO_29
L23
GPIO_30
Y28
GPIO_31
Y27
GPIO_32
G2
GPIO_33
G3
GPIO_34
G5
GPIO_35
G6
GPIO_36
G4
GPIO_37
L24
GPIO_38
P25
GPIO_39
L5
GPIO_40
K4
GPIO_41
K1
GPIO_42
L27
GPIO_43
M26
GPIO_44
N23
GPIO_45
R28
GPIO_46
R27
GPIO_47
R26
GPIO_48
P28
GPIO_49
P27
GPIO_50
K6
GPIO_51
K5
GPIO_52
P26
GPIO_53
M3
GPIO_54
M2
GPIO_55
M1
GPIO_56
L4
GPIO_57
L6
SGPIO_00
W27
SGPIO_01
W28
SGPIO_02
W26
SGPIO_03
W25
SGPIO_04
J 2
SGPIO_05
J 1
SGPIO_06
K3
SGPIO_07
K2
EBI_ADDR3
J23
EBI_ADDR4
J24
EBI_ADDR2
H25
EBI_ADDR1
H24
EBI_ADDR0
H23
EBI_ADDR5
J25
EBI_ADDR6
F26
EBI_ADDR8
H28
EBI_ADDR9
J26
EBI_ADDR13
H27
EBI_ADDR12
G26
EBI_ADDR11
J27
EBI_ADDR10
J28
EBI_ADDR7
F27
EBI_TAB
G24
EBI_WE1B
H26
EBI_CLK_IN
G27
EBI_CLK_OUT
G28
EBI_RWB
K23
EBI_CS0B
G25
NAND_DATA0
U24
NAND_DATA1
T26
NAND_DATA2
T27
NAND_DATA3
U26
NAND_DATA4
U27
NAND_DATA5
V26
NAND_DATA6
V27
NAND_DATA7
V28
NAND_CS0B
T24
NAND_ALE
R23
NAND_REB
T23
NAND_CLE
T25
NAND_WEB
R24
NAND_RBB
U25
SF_MISO
W24
SF_MOSI
U23
SF_SCK
V23
SF_CSB
V24
0 R183
0 R184
0 R185
0 R186
FLASH_WP
0.1uF
C14
0
R187
32.768KHz
X11-*1
KDS
15pF
50V
C22-*1
KDS
15pF
50V
C23-*1
KDS
M24C16-WMN6T
0IMMRSG036B
IC14
3
NC/E2
E2
2
NC/E1
E1
4
VSS
GND
1
NC/E0
NC
5
SDA
SDA
6
SCL
SCL
7
WC
WC
8
VCC
VCC
M24M01-HRMN6TP
IC102
3
E2
2
E1
4
VSS
1
NC
5
SDA
6
SCL
7
WP
8
VCC
NAND_DATA[0]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[4]
NAND_DATA[5]
NAND_DATA[7]
NAND_DATA[6] NAND_DATA[6]
NAND_DATA[1] NAND_DATA[1]
NAND_DATA[5]
NAND_DATA[2]
NAND_DATA[6]
NAND_DATA[3]
NAND_DATA[0]
NAND_DATA[7]
NAND_DATA[4]
NAND_DATA[1]
NAND_DATA[1]
NAND_DATA[5]
NAND_DATA[4]
NAND_DATA[2]
NAND_DATA[3]
NAND_DATA[6]
NAND_DATA[0]
NAND_DATA[7]
SYSTEM EEPROM
Boot Strap
1 1 3
N A N D _ I O [ 0 ] : F l a s h S e l e c t ( 1 )
0 : B o o t F r o m S e r i a l F l a s h
1 : Boot From NAND Flash
NAND_IO[1] : NAND Block 0 Write (0)
0 : E n a b l e B l o c k 0 W r i t e
1 : D i s a b l e B l o c k 0 W r i t e
NAND_IO[3:2] : NAND ECC (1,0)
00 : No ECC
0 1 : 1 E C C B i t
1 0 : 4 E C C B i t
1 1 : 8 E C C B i t
NAND_IO[4] : CPU Endian (0)
0 : L i t t l e E n d i a n
1 : B i g E n d i a n
N A N D _ I O [ 6 : 5 ] : X t a l B i a s C o n t r o l ( 1 , 0 )
0 0 : 1 . 2 m A
0 1 : 1 . 8 m A
10 : 2.4mA (Recommand)
1 1 : 3 . 0 m A
NAND_IO[7] : MIPS Frequency (0)
0 : 405MHz
1 : 378MHz
NAND_ALE : I2C Level (0)
0 : 3 . 3 V S w i t c h i n g
1 : 5 V S w i t c h i n g
NAND_CLE
0 : Enable D2CDIFF AC (Dns)
1 : Disable D2CDIFF AC
Debugging for AVC
BCM REVIEW
NAND FLASH MEMORY 4G BIT FOR BBTV
Open Drain
RESET
FOR JDEG
ISP Port for SUB MICOM
NEC SUB MICOM
CHECK PIN!!
PIN NAME
MICOM MODEL OPTION
MODEL_OPT_0
PK50/PK90
30
8
MODEL OPTION
PK70
MODEL_OPT_3
HIGH
11
MODEL_OPT_2
MODEL_OPT_1
PK90 PK50/PK70
PIN NO. LOW
31
NEC CONFIGURATION
* I2C_0 : TUNER
* I2C_1 : HDMI MUX, DEMOD, WIERLESS-JACK
* I2C_2 : NEC, AMP, (NVRAM)
* I2C_3 : SYSYEM EEPROM, MODULE
* I2C MAP
G19
MODEL_OPT_3
F7
B6
PIN NAME
MODEL_OPT_1
HD
PIN NO.
MODEL OPTION
MODEL_OPT_5
E18
LOW HIGH
C5
MODEL OPTION
FHD
MODEL_OPT_2
MODEL_OPT_4
MODEL_OPT_0
D18
A8’h‘
NOT USE
NOT USE
DDR 512MB
NOT USE
120KOhm 1%
100KOhm 1%
0
MODEL_OPT_3
0
RED ONLY
1
MODEL_OPT_0
0 1
ADD BREATHING RED & WHITE
0
DDR 256MB
LOW
HIGH
HIGH
c h a s s i s o p t i o n
OPT 1
LOW
LOW
OPT 5
LOW
HIGH
HIGH
BRAZIL
EURO
AUSTRALIA
replacement micom eeprom p/n : EAN61146201
replacement nvram p/n : EAN61086701
0 8 / 1 0 / 2 8
BCM GPIO/NEC MICOM/FLASH/SYS EEPROM
BCM GPIO & NEC MICOM & FLASH & SYS EEPROM
Copyright © 2010 LG Electronics Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only