LG 47LV370S-ZB, Service Manual

Page: 19 / 74

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDR_DQ[6]
DDR_DQ[20]
DDR_DQ[25]
DDR_DQ[27]
DDR_DQ[29]
DDR_DQ[23]
DDR_DQ[9]
DDR_DQ[0]
DDR_DQ[9]
DDR_DM[0]
DDR_DQ[24]
DDR_DQ[22]
DDR_DM[1]
DDR_DQ[14]
DDR_DQ[20]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[23]
DDR_DQ[30]
DDR_DQ[11]
DDR_DQ[21]
DDR_DQ[1]
DDR_DQ[21]
DDR_DQ[16]
DDR_DQ[3]
DDR_DM[2]
DDR_DQ[17]
DDR_DQ[2]
DDR_DQ[1]
DDR_DQ[27]
DDR_DQ[6]
DDR_DQ[8]
DDR_DQ[5]
DDR_DQ[16]
DDR_DQ[15]
DDR_DQ[7]
DDR_DQ[15]
DDR_DQ[30]
DDR_DQ[13]
DDR_DQ[12]
DDR_DQ[11]
DDR_DQ[26]
DDR_DM[3]
DDR_DQ[0]
DDR_DQ[28]
DDR_DQ[14]
DDR_DQ[13]
DDR_DQ[7]
DDR_DQ[31]
DDR_DQ[24]
DDR_DQ[26]
DDR_DQ[17]
DDR_DQ[19]
DDR_DQ[22]
DDR_DQ[28]
DDR_DQ[19]
DDR_DQ[4]
DDR_DQ[18]
DDR_DQ[2]
DDR_DQ[12]
DDR_DQ[29]
DDR_DQ[10]
DDR_DQ[31]
DDR_DQ[8]
DDR_DQ[25]
DDR_DQ[3]
DDR_DQ[10]
DDR_DQ[18]
+1.5V_DDR
C415
0.01uF
R419
56
1%
DDR_AA2
C440
1uF
DDR_AA11
C416
0.01uF
DDR_CKE
DDR_BAA2
K4B2G1646C
IC402
DDR_1333
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
AR402 56
DDR_AA0
DDR_AA14
DDR_AA7
DDR_AA10
R430
4.7K
OPT
DDR_AA3
C438 1uF
DDR23_AA4
DDR_DQ[24-31]
DDR_BAA0
DDR_BAA0
DDR_DQ[16-23]
DDR23_AA5
AR405 56
DDR01_AA4
R414 10K
DDR_BAA2
DDR_BAA2
R426 56
DDR_AA3
DDR_DQ[24-31]
DDR_BAA0
DDR01_AA5
R424 56
DDR_AA11
DDR23_AA4
R412
56
1%
DDR_DQ[6]
+1.5V_DDR
DDR_QS2b
C412
1uF
DDR23_CLK
C437
100pF
DDR_QS2
+1.5V_DDR
DDR_CASb
DDR_VREFA
DDR_AA12
DDR01_AA4
C435
0.01uF
DDR_RASb
DDR_AA0
DDR_DQ[10]
DDR_AA2
C436
0.01uF
DDR_QS0
DDR_RASb
C441 1uF
DDR_DQ[0]
DDR_AA11
DDR_AA7
DDR01_CLK
DDR_AA13
DDR23_CLKb
DDR_AA3
R431
4.7K
OPT
DDR_QS1b
R411 240
1%
+1.5V_DDR
C453
1uF
6.3V
DDR01_AA6
DDR_AA2
DDR_QS3b
DDR_AA0
DDR_AA14
R405
4.7K
DDR_1333
DDR_RASb
C454
1uF
6.3V
DDR_AA9
DDR_AA14
DDR_QS3b
DDR_DQ[1]
DDR_AA8
R402
4.7K
OPT
R429
82
C426
1uF
AR401 56
DDR_RESETb
DDR_AA12
DDR01_CLKb
DDR_VREFA
DDR23_AA6
DDR_WEb
+1.5V_DDR
DDR_AA14
DDR_DM[1]
C442
100pF
DDR23_CLK
R427 56
DDR_DM[0]
DDR_DQ[4]
DDR_DQ[8-15]
DDR_CKE
+1.5V_DDR
AR406 56
DDR_AA10
R421 240
1%
DDR_QS1
AR403 56
R407
4.7K
R420 10K
DDR_QS0b
DDR_RASb
DDR_AA8
DDR_AA3
DDR_WEb
DDR_AA2
DDR_AA1
DDR01_AA5
DDR_AA8
DDR_AA13
DDR23_AA5
+1.5V_DDR
DDR_DM[3]
DDR_AA7
DDR_QS1
DDR_DM[2]
R408
4.7K
DDR_AA1
R416
4.99K
1%
R413
56
1%
DDR23_AA4
DDR_AA8
C417
470pF
DDR23_AA5
R422
4.99K
1%
R404
4.7K
HYNIX_DDR
C450
0.1uF
DDR_CKE
DDR_BAA1
DDR_DQ[5]
DDR_RESETb
DDR01_AA5
+1.5V_DDR C451 0.1uF
DDR_AA12
DDR_CASb
DDR_BAA2
DDR_QS1b
DDR23_AA6
DDR_RESETb
DDR_AA9
DDR_BAA1
AR404 56
DDR_AA9
DDR_WEb
DDR_RESETb
R406
4.7K
OPT
DDR_DQ[8]
R410
4.7K
OPT
DDR_CASb
R409
4.7K
OPT
DDR_VREFA
R425 56
OPT
+1.5V_DDR
DDR01_AA6
DDR_AA13
DDR_AA10
DDR_BAA0
DDR01_CLKb
C419
1000pF
DDR_AA10
DDR_CASb
R415 240
1%
DDR01_AA6
K4B2G1646C
IC401
DDR_1333
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
DDR_AA13
+1.5V_DDR
R401
4.7K
DDR_1333
DDR_AA11
DDR_AA1
DDR_QS2
C452
0.1uF
DDR_QS3
DDR_CKE
DDR_BAA1
DDR_QS0
+1.5V_DDR
R403
4.7K
DDR_AA12
R418
56
1%
DDR01_CLK
C455
1uF
6.3V
DDR_QS2b
DDR_DQ[3]
R423
4.99K
1%
DDR_DQ[2]
DDR_AA9
+1.5V_DDR
DDR_BAA1
DDR_DQ[16-23]
DDR_AA0
DDR_DQ[8-15]
DDR23_CLKb
DDR_WEb
DDR_AA1
R428
82
C401
1000pF
DDR_DQ[0-7]
C439
1uF
DDR_DM[0-3] DDR_QS3
R417
4.99K
1%
DDR_AA7
DDR23_AA6
DDR_DQ[7]
DDR_QS0b
DDR_DQ[0-7]
DDR01_AA4
DDR_DQ[9]
R432
4.7K
OPT
C405
10uF C425
10uF C423
10uF
LGE35230(BCM35230KFSBG)
IC101
NON_BCM_CAP
DDR_DQA_0
U26
DDR_DQA_1
R26
DDR_DQA_2
U27
DDR_DQA_3
R27
DDR_DQA_4
V27
DDR_DQA_5
P26
DDR_DQA_6
U25
DDR_DQA_7
P27
DDR_DQA_8
R24
DDR_DQA_9
N24
DDR_DQA_10
T25
DDR_DQA_11
M23
DDR_DQA_12
R23
DDR_DQA_13
N25
DDR_DQA_14
T24
DDR_DQA_15
N26
DDR_DQA_16
L26
DDR_DQA_17
H27
DDR_DQA_18
L27
DDR_DQA_19
J26
DDR_DQA_20
M27
DDR_DQA_21
G27
DDR_DQA_22
M26
DDR_DQA_23
H26
DDR_DQA_24
L23
DDR_DQA_25
H25
DDR_DQA_26
L24
DDR_DQA_27
J24
DDR_DQA_28
M24
DDR_DQA_29
H23
DDR_DQA_30
L25
DDR_DQA_31
H24
DDR_DMA_0
T26
DDR_DMA_1
P25
DDR_DMA_2
J27
DDR_DMA_3
K24
DDR_DQSA_P_0
T27
DDR_DQSA_N_0
T28
DDR_DQSA_P_1
P24
DDR_DQSA_N_1
P23
DDR_DQSA_P_2
K27
DDR_DQSA_N_2
K28
DDR_DQSA_P_3
K25
DDR_DQSA_N_3
K26
DDR_ADA_0
V23
DDR_ADA_1
AB27
DDR_ADA_2
Y23
DDR_ADA_3
Y26
DDR_ADA_4
AB26
DDR_ADA_5
Y24
DDR_ADA_6
AC26
DDR_ADA_ALT_4
AB24
DDR_ADA_ALT_5
AC25
DDR_ADA_ALT_6
AC24
DDR_ADA_7
AB25
DDR_ADA_8
AD28
DDR_ADA_9
Y25
DDR_ADA_10
AA27
DDR_ADA_11
AC27
DDR_ADA_12
AA26
DDR_ADA_13
AA24
DDR_ADA_14
AD27
DDR_BAA_0
Y27
DDR_BAA_1
AB28
DDR_BAA_2
W24
DDR_RASA_N
V24
DDR_CASA_N
W25
DDR_WEA_N
V26
DDR_CKEA
U24
DDR_CKA01_P
W27
DDR_CKA01_N
W28
DDR_CKA23_P
N28
DDR_CKA23_N
N27
DDR_VREFA
U23
DDR_RST_N
AA23
DDR_ZQ
W26
C421
2.2uF C403
2.2uF C407
2.2uF
NFM18PS105R0J
C410
6.3V
OUT IN
GND
NFM18PS105R0J
C432
6.3V
OUT IN
GND
NFM18PS105R0J
C433
6.3V
OUT IN
GND
NFM18PS105R0J
C402
6.3V
OUT IN
GND
K4B2G1646C-HCK0
IC402-*1
DDR_1600
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
K4B2G1646C-HCK0
IC401-*1
DDR_1600
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
NC_5
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
C404 0.1uF
C406 0.1uF
C408 0.1uF
C409
0.1uF
C411
0.1uF
BCM35230
Bus Width : DDR_DQ[10]
0 - 16b
1 - 32b (O)
Chip Width : DDR_DQ[8]
0 - 8b
1 - 16b (O)
Chip Size : DDR_DQ[6:5]
00 - 4Gbit
01 - 2Gbit (O)
10 - 1Gbit
11 - 512Mbit
DUAL COMPONENT
IC401-*1
IC402-*1
1ST : T-K4B2G1646B_HCK0, 2ND : T-H5TQ2G63BFR-PBC
DDR STRAP
4
JEDEC Types : DDR_DQ[0:4]
00001 : DDR3-1333H (CasL=9)
10101 : DDR3-1600K (CasL=11) (O)
MAIN DDR
50
IC401,IC402 1ST : EAN61667501, 2ND : EAN61570701
DDR_DQ[9] DDR_DQ[7] Maker
1 1 SS
Hynix
Reserve
Reserve
0 1
1 0
0 0
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Only for training and service purposes
LGE Internal Use Only