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LG Electronics Inc. All rights reserved.
Only for training and service purposes.
BLOCK DIAGRAM
OC
P
1.5A
Audio
AM
P
(DTA
2010M
)
Main IC
IF
(+/-)
USB1 (2
.0)
OPTIC
LA
N1
DDR3 2133M
bps
(256
MB
X 16EA
)
USB2 (2
.0)
HD
MI
1
(2.0)
SY
ST
EM
EEPROM
(1Kb
it)
eMMC
(4Gby
te)
DDR4
2666M
bps
(256
MB
X 16E
A)
X_
TA
L
24
MH
z
I2S
Out
AV
D-De
mod
: I2
C
2
R E A R
S I D E
R E A R (H)
EX
T.
AM
P
SPDIF
OUT
Tuner
: I2
C
5
CVBS
/SIF
Tuner
(A
RC)
Ext.
SPK
L/R
TI
MI
CO
M
IR
/K
ey
/E
ye
UART
S/
W
(T
x/
Rx
)
RS232
Debug
X_
TA
L
32.768
MH
z
I2
C 1
R E A R
VB
Y1
51p
Ti
Mi
co
m
VB
Y1
41p
Data
De
mod
TV
Li
nk
CFG
HD
MI
2
(2.0)
OC
P
1.5A
Com
ponent
Summary of Contents for 43UU340C
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