THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2014-12-21
MAIN2_POWER
2
LM14A
L200
PZ1608U121-2R0TF
C263
10uF
10V
C320
0.47uF
6.3V
AVDD15_MOD
L209
PZ1608U121-2R0TF
+3.5V_WOL
AVDD33_ADC
C229
0.1uF
C221
0.1uF
C211
0.47uF
C210
0.47uF
C246
1uF
10V
AVDD_AU33
L226
PZ1608U121-2R0TF
+1.1V_VDDC
DVDD_DDR11
C201
10uF
10V
C214
0.47uF
+1.1V_VDDC_CPU
L201
PZ1608U121-2R0TF
R202
0
C226
0.1uF
C266
0.1uF
C235
0.1uF
C274
0.1uF
+3.3V_NORMAL
C308
0.1uF
C243
0.1uF
16V
5V_HDMI_1
C200
1uF
25V
C205
10uF
10V
AVDD15_MOD
AVDDP3P3
C234
0.1uF
AVDD_DMPLL
JP202
+3.3V_NORMAL
C222
10uF
10V
JP205
DVDD_DDR11
C245
0.1uF
C216
0.47uF
C253
0.1uF
BOTTOM_CAP_FOR_RIPPLE
DVDD_DDR11
C204
0.1uF
L227
PZ1608U121-2R0TF
C260
10uF
10V
+3.5V_ST
C314
0.47uF
R200
10
R201
0
AVDDL_MOD11
+1.1V_VDDC_CPU
AVDD_DDR
AVDD_AU33
AVDD33_ADC
C213
0.47uF
AVDDP3P3_MHL
AVDD_DMPLL
L219
PZ1608U121-2R0TF
+3.3V_NORMAL
C250
10uF
BOTTOM_CAP_FOR_RIPPLE
C278
0.1uF
C292
0.47uF
6.3V
BOTTOM_CAP_FOR_RIPPLE
AVDD_DDR
C299
0.1uF
L224
PZ1608U121-2R0TF
AVDD_DMPLL
C224
0.1uF
+3.5V_WOL
VDDP_NAND_C
C256
10uF
10V
C209
0.1uF
C268
10uF
10V
C223
10uF
10V
IC201
AP2151WG-7
3
FLG
2
GND
4
EN
1
OUT
5
IN
AVDDP3P3_MHL
+1.1V_VDDC
L215
PZ1608U121-2R0TF
IC200
AP2121N-3.3TRE1
1
GND
2
VOUT
3
VIN
+1.1V_VDDC
+3.3V_NORMAL
C323
0.1uF
16V
BOTTOM_CAP_FOR_RIPPLE
VDDP_NAND_C
+1.8V
WOL_CTL
C239
0.1uF
C227
0.1uF
C219
0.1uF
JP203
AVDDP3P3
L203
PZ1608U121-2R0TF
C225
0.1uF
C261
0.1uF
16V
BOTTOM_CAP_FOR_RIPPLE
AVDDL_MOD11
+1.5V_DDR
C241
0.47uF
6.3V
BOTTOM_CAP_FOR_RIPPLE
AVDD_DMPLL
VDDP_NAND_A
C215
0.47uF
AVDD_DDR
C220
0.47uF
C316
10uF
10V
C287
0.1uF
C307
0.1uF
AVDD_DDR
C212
0.47uF
R203
1K
OPT
AVDD5V_MHL
DVDD_NODIE
AVDD_DMPLL
AVDD5V_MHL
C322
10uF
BOTTOM_CAP_FOR_RIPPLE
C244
0.1uF
C230
0.1uF
C276
0.1uF
C207
10uF
10V
L208
PZ1608U121-2R0TF
C203
0.1uF
C242
0.1uF
VDDP_NAND_A
C236
10uF
10V
C217
10uF
10V
BOTTOM_CAP_FOR_RIPPLE
DVDD_DDR11
L221
PZ1608U121-2R0TF
R204
10K
OPT
C311
0.47uF
BOTTOM_CAP_FOR_RIPPLE
+1.1V_VDDC
JP204
C240
0.1uF
BOTTOM_CAP_FOR_RIPPLE
L202
PZ1608U121-2R0TF
WOL_WAKE_UP
R169
0
WOL_WAKE_UP
WOL_WAKE_UP_SOC
AVDD_DMPLL
R205
10K
WOL_WAKE_UP
C257
0.47uF
6.3V
C324
0.47uF
6.3V
C238
0.47uF
6.3V
C247
0.47uF
6.3V
C248
0.47uF
6.3V
C249
0.47uF
6.3V
C251
0.47uF
6.3V
C252
0.47uF
6.3V
+5V_NORMAL
R206
10K
HDMI_LEAK
Q200
RUE003N02
ROHM_HDMI_LEAK
S
D
G
R207
0
non_HDMI_LEAK
Q200-*1
SI1012CR-T1-GE3
VISHAY_HDMI_LEAK
S
D
G
C208
10uF
10V
IC100
LGE5332(LM14A)
VDDC_1
J9
VDDC_2
J10
VDDC_3
J11
VDDC_4
J12
VDDC_5
J13
VDDC_6
K9
VDDC_7
K10
VDDC_8
K11
VDDC_9
K12
VDDC_10
K13
VDDC_11
L9
VDDC_12
L10
VDDC_13
L11
VDDC_14
L12
VDDC_15
R11
VDDC_16
R12
VDDC_17
R13
VDDC_18
T11
VDDC_19
T12
VDDC_20
T13
VDDC_21
U11
VDDC_22
U12
VDDC_23
U13
AVDDL_PREDRV_1
W21
AVDDL_PREDRV_2
Y21
AVDDL_PREDRV_3
AD29
AVDDL_MOD_1
AD30
AVDDL_MOD_2
W20
AVDDL_MOD_3
Y20
AVDD15_MOD_1
U19
AVDD15_MOD_2
V19
AVDDL_USB3_1
AA13
AVDDL_USB3_2
AF11
VDDC_CPU_1
U21
VDDC_CPU_2
U22
VDDC_CPU_3
U23
VDDC_CPU_4
U24
VDDC_CPU_5
U25
VDDC_CPU_6
V23
VDDC_CPU_7
V24
VDDC_CPU_8
V25
VDDC_CPU_9
W23
VDDC_CPU_10
W24
VDDC_CPU_11
W25
VDDC_CPU_12
Y23
VDDC_CPU_13
Y24
VDDC_CPU_14
Y25
VDDC_CPU_15
AA22
VDDC_CPU_16
AA23
VDDC_CPU_17
AA24
VDDC_CPU_18
AA25
VDDC_CPU_19
AB24
VDDC_CPU_20
AB25
MCP_VDDC_1
AE16
MCP_VDDC_2
AF16
DVDD_NODIE
L13
DVDD_DDR_1
K21
DVDD_DDR_2
N21
DVDD_DDR_3
M21
DVDD_DDR_4
L21
VDDC_24
AC17
VDDC_25
AC18
VDDC_26
AC19
VDDC_27
AC20
VDDC_28
AC21
VDDC_29
AC22
VDDC_30
AD17
VDDC_31
AD18
VDDC_32
AD19
VDDC_33
AD20
VDDC_34
AD21
VDDC_35
AD22
VDDC_36
AE19
VDDC_37
AE20
VDDC_38
AE21
VDDC_39
AE22
VDD_SRAM_1
AE31
VDD_SRAM_2
AC24
VDD_SRAM_3
AD23
CTRL_SRAMLDO
AE30
EMMC_CTRL
A6
AVDD_NODIE
V7
AVDDL_MHL3_1
L7
AVDDL_MHL3_2
N12
AVDD3P3_MHL3_1
R7
AVDD3P3_MHL3_2
T7
AVDD3P3_ETH
Y7
AVDD3P3_DADC_1
AB7
AVDD3P3_DADC_2
AB8
AVDD3P3_ADC_1
AA7
AVDD3P3_ADC_2
AA8
AVDD3P3_USB_1
G9
AVDD3P3_USB_2
G10
AVDD3P3_USB3_1
AB15
AVDD3P3_USB3_2
AF13
AVDD_AU33
AD7
AVDD_EAR33
AE7
AVDD3P3_DMPLL
AF8
VDDP_1
AE15
VDDP_2
AF15
AVDD_MOD_1
V17
AVDD_MOD_2
V18
AVDD_LPLL_1
W19
AVDD_LPLL_2
Y19
AVDD_PLL_A
N15
AVDD_PLL_B
N16
VDDP_3318_A/[3.3V/1.8V]
H16
VDDP_3318_C/[3.3V/1.8V]
K16
AVDD_DDR_A_1
J21
AVDD_DDR_A_2
K17
AVDD_DDR_A_3
K18
AVDD_DDR_A_4
K19
AVDD_DDR_A_5
L17
AVDD_DDR_A_6
L19
AVDD_DDR_A_7
L20
AVDD_DDR_B_1
J23
AVDD_DDR_B_2
K22
AVDD_DDR_B_3
K23
AVDD_DDR_B_4
M22
AVDD_DDR_B_5
N22
AVDD_DDR_B_6
N23
AVDD_DDR_B_7
P23
AVDD_DDR_LDO_A
L18
AVDD_DDR_LDO_B
L22
AVDD_HDMI_5V_PA
H7
GND_EFUSE
G8
AVDD_DDR_VBP_A_1
C14
AVDD_DDR_VBP_A_2
B14
AVDD_DDR_VBP_A_3
J17
AVDD_DDR_VBP_A_4
J18
AVDD_DDR_VBN_A_1
B15
AVDD_DDR_VBN_A_2
C15
AVDD_DDR_VBN_A_3
J19
AVDD_DDR_VBN_A_4
J20
AVDD_DDR_VBP_B_1
AC30
AVDD_DDR_VBP_B_2
AC31
AVDD_DDR_VBP_B_3
K24
AVDD_DDR_VBP_B_4
L24
AVDD_DDR_VBN_B_1
AD31
AVDD_DDR_VBN_B_2
AD32
AVDD_DDR_VBN_B_3
L23
AVDD_DDR_VBN_B_4
M24
C294
1uF
25V
C295
1uF
25V
Close to chip side
1st layer
4th layer
2A
1st layer
Close to chip side
4th layer
Close to chip side
Close to chip side
GND JIG POINT
2A
+3.3V_Bypass Cap
Close to chip side
2A
4th layer
4th layer
4th layer
+1.1V_Bypass Cap(CLOSE TO CHIP SIDE)
1st layer
4th layer
2A
WOL POWER ENABLE CONTROL
Close to chip side
1st layer
Close to chip side
Close to chip side
4th layer
Close to chip side
4th layer
2A
2A
Close to chip side
Close to chip side
4A
1st layer
2A
2A
+1.5V_Bypass Cap
Close to chip side
4th layer
Close to chip side
Close to chip side
4th layer
BSD-15Y-LM14A-002_00-HD
Copyright © 2015 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
Summary of Contents for 43UF6800 Series
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