LGE Internal Use Only
Copyright©2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes
75
R390
DDR0_CLK1b
DDR0_M_Data[0-63
]
E7
33
R325
2700pF
C310
DDR0_WEb
A 2 ; B 5 ; B 2 ; H 5 ; I1
75
R393
0 . 1 u F
C333
DDR0_RASb
D2.6V
DDR0_DQM7
DDR0_VTT
DDR0_ADDR[0-12]
A1;A4;D5;H7;I2
470pF
C375
33
R303
DDR0_DQS3
H5
DDR0_REF
DDR0_ADDR[0-12]
0 . 0 1 u F
C383
33
R356
DDR0_DQM_5
F1
470pF
C388
470pF
C319
DDR0_DQS4 H5
100uF
C320
DDR0_ADDR[0-12]
A4;D5;D2;H7;I2
DDR0_DQM_6
F2
470pF
C305
470pF
C389
DDR0_REF
DDR0_BA_0
DDR0_ADDR[0-12]
A1;A4;D5;D2;I2
DDR0_VTT
0 . 1 u F
C301
33
R300
33
R328
33
R345
DDR0_CKE
B5;B2;D5;D2;H5
1000pF
C371
DDR0_CLK1
D 5 ; H 5 ; I3
75
R412
DDR0_CASb
DDR0_CLK1
D2.6V
33
R349
0 . 0 1 u F
C382
75
R386
DDR0_BA_1
H6
DDR0_DQM3
33
R357
0 . 0 1 u F
C347
DDR0_REF
D2.6V
33
R310
4 . 7 u F
C398
DDR0_DQM5
1000pF
C351
DDR0_DQM6
DDR0_DQS6
DDR0_DQM0
0 . 1 u F
C346
DDR0_WEb
470pF
C315
2700pF
C304
DDR0_CLK0b
75
R402
DDR0_BA0
A 5 ; B 5 ; B 2 ; H 7 ; I1
DDR0_DQM_0
B2
33
R302
1uF
C334
DDR0_CLK0
DDR0_VTT
75
R379
75
R311
DDR0_DQM3
H6
75
R391
75
R407
75
R305
DDR0_DQM_4
D2
75
R415
4 . 7 u F
C397
0 . 0 1 u F
C386
75
R410
0 . 1 u F
C316
0 . 1 u F
C318
0 . 0 1 u F
C385
0 . 1 u F
C332
0 . 1 u F
C366
DDR0_CASb
DDR0_VTT
DDR0_CASb
A 5 ; B 5 ; B 2 ; H 5 ; I1
75
R408
33
R341
470pF
C387
DDR0_CASb
A2;A5;B5;B2;H5
DDR0_BA1
DDR0_RASb
A2;A5;B5;B2;H5
DDR0_DQM4
H6
0 . 0 1 u F
C394
75
R373
0 . 1 u F
C340
DDR0_WEb
75
R315
33
R339
100uF
C326
0 . 0 1 u F
C308
33
R321
33
R326
DDR0_DQS3
33
R382
0 . 0 1 u F
C328
DDR0_CKE
75
R389
33
R350
DDR0_DQM_7
B6
33
R381
DDR0_RASb
DDR0_DQM_2
B5
75
R414
33
R314
33
R307
33
R322
75
R405
DDR0_BA1
A2;A5;B5;B2;H7
75
R306
0 . 1 u F
C321
DDR0_RASb
DDR0_REF
33
R329
0 . 0 1 u F
C337
DDR0_BA0
0 . 0 1 u F
C302
0 . 1 u F
C364
0 . 0 1 u F
C395
DDR0_CASb
DDR0_DQS2
H6
470pF
C331
DDR0_DQM_3
A5
33
R375
470pF
C317
DDR0_DQS7
33
R324
33
R336
33
R347
33
R348
33
R327
DDR0_DQS7
H5
DDR0_CLK1b D5;H5;I2
33
R360
75
R396
D2.6V
33
R316
2 . 2 u F
C357
75
R404
75
R370
DDR0_BA1
DDR0_WEb
A2;A5;B5;B2;H5
DDR0_CSB
b
DDR0_DQM2
DDR0_DQM_4 F1
470pF
C374
DDR0_DQ[0-63]
F7
33
R355
DDR0_BA1
1uF
C335
DDR0_DQM_1
A2
DDR0_CLK1b
D 2 ; H 5 ; I2
470pF
C391
33
R344
0 . 1 u F
C314
DDR0_CLK0b
SC2595ST
R
IC305
3
V_SENSE
2
GND
4
VREF
1
NC
5
VDDQ
6
AVCC
7
PVCC
8
VTT
DDR0_BA1
A 5 ; B 5 ; B 2 ; H 7 ; I1
DDR0_CLK0
33
R338
33
R353
1000pF
C372
DDR0_CLK1
D5;D2;H5
DDR0_REF
DDR0_CKE
B 5 ; B 2 ; D 5 ; H 5 ; I1
0 . 1 u F
C362
33
R312
DDR0_ADDR[0-12]
A1;A4;D5;D2;H7
33
R318
0 . 0 1 u F
C350
DDR0_ADDR10
H6
75
R398
1000pF
C348
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE
S
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC
.
DDR0_CSB
b
33
R354
470pF
C325
0 . 1 u F
C312
100uF
C306
DDR0_VTT
DDR0_DQM_3
E1
75
R313
DDR0_DQM_2
0 . 1 u F
C367
33
R359
DDR0_RASb
A 5 ; B 5 ; B 2 ; H 5 ; I1
D2.6V
DDR0_RASb
A 2 ; B 5 ; B 2 ; H 5 ; I1
DDR0_CSB
b
A2;A5;B5;B2;H5
DDR0_CASb
A 2 ; B 5 ; B 2 ; H 5 ; I1
D2.6V
DDR0_BA0
D2.6V
DDR0_DQM5
H6
33
R378
75
R317
33
R366
33
R301
DDR0_DQS0
H6
L302
75
R409
470pF
C360
DDR_DATA[0-63]
D7
0 . 0 1 u F
C384
1000pF
C342
DDR0_CLK0
B5;B2;H5
DDR0_DQM7
H6
33
R371
33
R380
DDR0_BA0
33
R351
DDR_DATA[0-63]
A6
0 . 0 1 u F
C379
DDR0_CSB
b
33
R332
33
R384
0 . 1 u F
C307
33
R333
33
R383
0 . 0 1 u F
C381
33
R342
33
R372
DDR0_DQS6 H5
0 . 0 4 7 u F
C329
33
R334
0 . 0 1 u F
C396
75
R388
DDR0_BA1
A 2 ; B 5 ; B 2 ; H 7 ; I1
0 . 0 1 u F
C392
DDR0_REF
DDR0_CKE
DDR0_DQS1
H6
0 . 0 1 u F
C377
DDR0_CLK0b
33
R330
33
R352
DDR0_DQS0
DDR0_DQM_6
D6
33
R331
1000pF
C345
0 . 1 u F
C343
0 . 0 1 u F
C376
1000pF
C368
470pF
C313
1000pF
C373
DDR0_DQS1
470pF
C356
470pF
C390
33
R364
A1.2V
1000pF
C370
0 . 0 4 7 u F
C309
33
R340
DDR0_DQM1
75
R411
DDR0_DQS5
75
R309
D2.6V
33
R337
75
R413
DDR0_ADDR10
0 . 0 1 u F
C341
75
R401
D2.6V
75
R376
DDR0_BA_0
H6
DDR0_DQM4
0 . 0 4 7 u F
C323
33
R346
0 . 0 1 u F
C378
33
R308
BCM3553
IC100
DDR0_DATA00
B9
DDR0_DATA01
F10
DDR0_DATA02
C10
DDR0_DATA03
E10
DDR0_DATA04
E12
DDR0_DATA05
B10
DDR0_DATA06
G10
DDR0_DATA07
D11
DDR0_DATA08
F13
DDR0_DATA09
C12
DDR0_DATA10
E13
DDR0_DATA11
B12
DDR0_DATA12
D12
DDR0_DATA13
G12
DDR0_DATA14
B11
DDR0_DATA15
C11
DDR0_DATA16
B13
DDR0_DATA17
G13
DDR0_DATA18
D14
DDR0_DATA19
E14
DDR0_DATA20
E15
DDR0_DATA21
B14
DDR0_DATA22
F14
DDR0_DATA23
C14
DDR0_DATA24
E16
DDR0_DATA25
B16
DDR0_DATA26
G16
DDR0_DATA27
C16
DDR0_DATA28
C15
DDR0_DATA29
D16
DDR0_DATA30
B15
DDR0_DATA31
D15
DDR0_DATA32
B20
DDR0_DATA33
F20
DDR0_DATA34
D20
DDR0_DATA35
F21
DDR0_DATA36
C21
DDR0_DATA37
B21
DDR0_DATA38
E21
DDR0_DATA39
E20
DDR0_DATA40
F23
DDR0_DATA41
D22
DDR0_DATA42
G23
DDR0_DATA43
B23
DDR0_DATA44
C22
DDR0_DATA45
E23
DDR0_DATA46
B22
DDR0_DATA47
D21
DDR0_DATA48
B24
DDR0_DATA49
E24
DDR0_DATA50
C24
DDR0_DATA51
G25
DDR0_DATA52
C25
DDR0_DATA53
D24
DDR0_DATA54
F25
DDR0_DATA55
B25
DDR0_DATA56
D27
DDR0_DATA57
B27
DDR0_DATA58
C28
DDR0_DATA59
B28
DDR0_DATA60
C26
DDR0_DATA61
C27
DDR0_DATA62
D25
DDR0_DATA63
B26
DDR0_ADDR00
C19
DDR0_ADDR01
D18
DDR0_ADDR02
B18
DDR0_ADDR03
B17
DDR0_ADDR04
D17
DDR0_ADDR05
C17
DDR0_ADDR06
C18
DDR0_ADDR07
G18
DDR0_ADDR08
E18
DDR0_ADDR09
G17
DDR0_ADDR10
B19
DDR0_ADDR11
F17
DDR0_ADDR12
E17
DDR0_BA0
C20
DDR0_BA1
D19
DDR0_DM0
F11
DDR0_DM1
G11
DDR0_DM2
F15
DDR0_DM3
G15
DDR0_DM4
E22
DDR0_DM5
F22
DDR0_DM6
F26
DDR0_DM7
D26
DDR0_DQS0
E11
DDR0_DQS1
F12
DDR0_DQS2
G14
DDR0_DQS3
F16
DDR0_DQS4
G21
DDR0_DQS5
G22
DDR0_DQS6
E25
DDR0_DQS7
E26
DDR0_RAS
E19
DDR0_CAS
G19
DDR0_WE
G20
EXT_DDR0_CLK
G26
DDR0_CLK0
C13
DDR0_CLK0B
D13
DDR0_CLK1
D23
DDR0_CLK1B
C23
DDR0_CKE
F18
DDR0_CSB
0
F19
DDR0_VREF0
B8
DDR0_VREF1
B29
DDR0_BVDD1P2_
0
D9
DDR0_BVDD1P2_
1
D28
DDR0_BVSS_
0
C9
DDR0_BVSS_
1
D29
DDR0_PLL_AIO
A30
DDR0_VDDO2P5_
1
A9
DDR0_VDDO2P5_
2
A12
DDR0_VDDO2P5_
3
A15
DDR0_VDDO2P5_
4
A18
DDR0_VDDO2P5_
5
A21
DDR0_VDDO2P5_
6
A24
DDR0_VDDO2P5_
7
A27
DDR0_VDDO2P5_
8
F9
DDR0_VDDO2P5_
9
J 11
DDR0_VDDO2P5_1
0
J 12
DDR0_VDDO2P5_1
1
J 13
DDR0_VDDO2P5_1
2
J 14
DDR0_VDDO2P5_1
3
J 15
DDR0_VDDO2P5_1
4
J 16
DDR0_VDDO2P5_1
5
J 17
DDR0_VDDO2P5_1
6
J 18
DDR0_VDDO2P5_1
7
J 19
DDR0_VDDO2P5_1
8
J 20
DDR0_VDDO2P5_1
9
J 21
DDR0_VDDO2P5_2
0
J 22
DDR0_VDDO2P5_2
1
J 23
DDR0_VDDO2P5_2
2
J 24
DDR0_VDDO2P5_2
3
J 25
DDR0_VDDO2P5_2
4
G24
2700pF
C330
33
R374
DDR0_DQS2
DDR0_VTT
33
R343
DDR0_DQM_1
E2
33
R363
DDR0_VTT
0 . 1 u F
C361
DDR0_DQM1
H6
33
R365
D2.6V
DDR0_DQM_5
B2
DDR0_DQM_7
F2
0 . 0 1 u F
C344
33
R367
DDR0_DQM2
H6
DDR0_CKE
B 5 ; B 2 ; D 2 ; H 5 ; I1
DDR0_WEb
A 5 ; B 5 ; B 2 ; H 5 ; I1
10uF
C339
75
R434
75
R387
75
R395
DDR0_CLK1
D 2 ; H 5 ; I3
33
R323
33
R361
33
R358
DDR0_DQM_0
E2
0 . 1 u F
C349
75
R403
DDR0_BA_1
75
R406
0 . 1 u F
C365
0 . 1 u F
C327
DDR0_CSB
b
A 5 ; B 5 ; B 2 ; H 5 ; I2
DDR0_VTT
DDR0_BA0
A 2 ; B 5 ; B 2 ; H 7 ; I1
100uF
C300
DDR0_DQM0
H6
1000pF
C369
DDR0_DQS5
H5
33
R385
75
R399
470pF
C311
0 . 0 1 u F
C322
75
R392
DDR0_CSB
b
A 2 ; B 5 ; B 2 ; H 5 ; I2
75
R394
33
R335
DDR0_DQ[0-63]
F7
D2.6V
DDR0_CLK0b
B5;B2;H5
2700pF
C324
DDR0_CLK0
DDR0_BA0
A2;A5;B5;B2;H7
DDR0_CLK1b
D5;D2;H5
D2.6V
33
R304
D2.6V
33
R369
DDR0_VTT
0 . 0 4 7 u F
C303
0 . 1 u F
C363
0 . 0 1 u F
C380
DDR0_M_Data[0-63
]
I 7
33
R320
DDR0_ADDR[0-12]
A1;D5;D2;H7;I2
DDR0_DQS4
DDR0_CKE
B 5 ; B 2 ; D 5 ; D 2 ; I1
DDR0_DQM6
H6
33
R368
75
R319
33
R377
33
R362
DDR0_WEb
75
R397
D2.6V
0 . 0 1 u F
C393
100uF
C358
220uF
C352
10uF
C336
33uF
C338
1uF
C359
HY5DU561622FTP-D43-C
IC304
26
BA0
27
BA1
28
A10/AP
29
A0
30
A1
31
A2
32
A3
33
VDD_3
34
VSS_1
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
41
A11
42
A12
43
NC_5
44
CKE
45
CK
46
/CK
47
UDM
48
VSS_2
49
VREF
50
NC_6
17
NC_2
3
VDDQ_1
6
VSSQ_1
16
LDQS
15
VDDQ_3
14
NC_1
13
DQ7
12
VSSQ_2
11
DQ6
10
DQ5
9
VDDQ_2
8
DQ4
7
DQ3
4
DQ1
5
DQ2
25
NC_4
24
/CS
23
/RAS
2
DQ0
22
/CAS
21
/WE
1
VDD_1
20
LDM
19
NC_3
18
VDD_2
51
UDQS
52
VSSQ_3
53
NC_7
54
DQ8
55
VDDQ_4
56
DQ9
57
DQ10
58
VSSQ_4
59
DQ11
60
DQ12
61
VDDQ_5
62
DQ13
63
DQ14
64
VSSQ_5
65
DQ15
66
VSS_3
HY5DU561622FTP-D43-C
IC303
26
BA0
27
BA1
28
A10/AP
29
A0
30
A1
31
A2
32
A3
33
VDD_3
34
VSS_1
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
41
A11
42
A12
43
NC_5
44
CKE
45
CK
46
/CK
47
UDM
48
VSS_2
49
VREF
50
NC_6
17
NC_2
3
VDDQ_1
6
VSSQ_1
16
LDQS
15
VDDQ_3
14
NC_1
13
DQ7
12
VSSQ_2
11
DQ6
10
DQ5
9
VDDQ_2
8
DQ4
7
DQ3
4
DQ1
5
DQ2
25
NC_4
24
/CS
23
/RAS
2
DQ0
22
/CAS
21
/WE
1
VDD_1
20
LDM
19
NC_3
18
VDD_2
51
UDQS
52
VSSQ_3
53
NC_7
54
DQ8
55
VDDQ_4
56
DQ9
57
DQ10
58
VSSQ_4
59
DQ11
60
DQ12
61
VDDQ_5
62
DQ13
63
DQ14
64
VSSQ_5
65
DQ15
66
VSS_3
HY5DU561622FTP-D43-C
IC301
26
BA0
27
BA1
28
A10/AP
29
A0
30
A1
31
A2
32
A3
33
VDD_3
34
VSS_1
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
41
A11
42
A12
43
NC_5
44
CKE
45
CK
46
/CK
47
UDM
48
VSS_2
49
VREF
50
NC_6
17
NC_2
3
VDDQ_1
6
VSSQ_1
16
LDQS
15
VDDQ_3
14
NC_1
13
DQ7
12
VSSQ_2
11
DQ6
10
DQ5
9
VDDQ_2
8
DQ4
7
DQ3
4
DQ1
5
DQ2
25
NC_4
24
/CS
23
/RAS
2
DQ0
22
/CAS
21
/WE
1
VDD_1
20
LDM
19
NC_3
18
VDD_2
51
UDQS
52
VSSQ_3
53
NC_7
54
DQ8
55
VDDQ_4
56
DQ9
57
DQ10
58
VSSQ_4
59
DQ11
60
DQ12
61
VDDQ_5
62
DQ13
63
DQ14
64
VSSQ_5
65
DQ15
66
VSS_3
HY5DU561622FTP-D43-C
IC302
26
BA0
27
BA1
28
A10/AP
29
A0
30
A1
31
A2
32
A3
33
VDD_3
34
VSS_1
35
A4
36
A5
37
A6
38
A7
39
A8
40
A9
41
A11
42
A12
43
NC_5
44
CKE
45
CK
46
/CK
47
UDM
48
VSS_2
49
VREF
50
NC_6
17
NC_2
3
VDDQ_1
6
VSSQ_1
16
LDQS
15
VDDQ_3
14
NC_1
13
DQ7
12
VSSQ_2
11
DQ6
10
DQ5
9
VDDQ_2
8
DQ4
7
DQ3
4
DQ1
5
DQ2
25
NC_4
24
/CS
23
/RAS
2
DQ0
22
/CAS
21
/WE
1
VDD_1
20
LDM
19
NC_3
18
VDD_2
51
UDQS
52
VSSQ_3
53
NC_7
54
DQ8
55
VDDQ_4
56
DQ9
57
DQ10
58
VSSQ_4
59
DQ11
60
DQ12
61
VDDQ_5
62
DQ13
63
DQ14
64
VSSQ_5
65
DQ15
66
VSS_3
DDR0_DQ[0-63]
DDR_DATA[31]
DDR_DATA[30]
DDR_DATA[29]
DDR_DATA[27]
DDR_DATA[26]
DDR_DATA[25]
DDR_DATA[24]
DDR_DATA[28]
DDR_DATA[16]
DDR_DATA[17]
DDR_DATA[18]
DDR_DATA[19]
DDR_DATA[23]
DDR_DATA[22]
DDR_DATA[21]
DDR_DATA[20]
DDR_DATA[59]
DDR_DATA[58]
DDR_DATA[57]
DDR_DATA[56]
DDR_DATA[60]
DDR_DATA[61]
DDR_DATA[62]
DDR_DATA[63]
DDR_DATA[52]
DDR_DATA[53]
DDR_DATA[54]
DDR_DATA[55]
DDR_DATA[51]
DDR_DATA[50]
DDR_DATA[49]
DDR_DATA[48]
DDR_DATA[32]
DDR_DATA[33]
DDR_DATA[34]
DDR_DATA[35]
DDR_DATA[39]
DDR_DATA[38]
DDR_DATA[37]
DDR_DATA[36]
DDR_DATA[0 ]
DDR_DATA[1 ]
DDR_DATA[2 ]
DDR_DATA[3 ]
DDR_DATA[7 ]
DDR_DATA[6 ]
DDR_DATA[5 ]
DDR_DATA[4 ]
DDR_DATA[43]
DDR_DATA[42]
DDR_DATA[41]
DDR_DATA[40]
DDR_DATA[44]
DDR_DATA[45]
DDR_DATA[46]
DDR_DATA[47]
DDR_DATA[11 ]
DDR_DATA[10]
DDR_DATA[9 ]
DDR_DATA[8 ]
DDR_DATA[12]
DDR_DATA[13]
DDR_DATA[14]
DDR_DATA[15]
DDR0_DQ[0]
DDR0_DQ[2]
DDR0_DQ[7]
DDR0_DQ[5]
DDR0_DQ[4]
DDR0_DQ[15]
DDR0_DQ[14]
DDR0_DQ[12]
DDR0_DQ[9]
DDR0_DQ[11]
DDR0_DQ[16]
DDR0_DQ[18]
DDR0_DQ[23]
DDR0_DQ[21]
DDR0_DQ[20]
DDR0_DQ[31]
DDR0_DQ[30]
DDR0_DQ[28]
DDR0_DQ[25]
DDR0_DQ[27]
DDR0_DQ[32]
DDR0_DQ[34]
DDR0_DQ[39]
DDR0_DQ[37]
DDR0_DQ[36]
DDR0_DQ[47]
DDR0_DQ[46]
DDR0_DQ[44]
DDR0_DQ[41]
DDR0_DQ[43]
DDR0_DQ[48]
DDR0_DQ[50]
DDR0_DQ[55]
DDR0_DQ[53]
DDR0_DQ[52]
DDR0_DQ[63]
DDR0_DQ[62]
DDR0_DQ[60]
DDR0_DQ[57]
DDR0_DQ[59]
DDR0_DQ[6]
DDR0_DQ[3]
DDR0_DQ[1]
DDR0_DQ[13]
DDR0_DQ[10]
DDR0_DQ[8]
DDR0_DQ[17]
DDR0_DQ[22]
DDR0_DQ[19]
DDR0_DQ[29]
DDR0_DQ[26]
DDR0_DQ[24]
DDR0_DQ[38]
DDR0_DQ[35]
DDR0_DQ[33]
DDR0_DQ[42]
DDR0_DQ[40]
DDR0_DQ[45]
DDR0_DQ[54]
DDR0_DQ[51]
DDR0_DQ[49]
DDR0_DQ[58]
DDR0_DQ[56]
DDR0_DQ[61]
DDR0_M_Data[0]
DDR0_M_Data[2]
DDR0_M_Data[7]
DDR0_M_Data[5]
DDR0_M_Data[12
]
DDR0_M_Data[14
]
DDR0_M_Data[9]
DDR0_M_Data[11]
DDR0_M_Data[4]
DDR0_M_Data[15
]
DDR0_M_Data[16
]
DDR0_M_Data[18
]
DDR0_M_Data[23
]
DDR0_M_Data[21
]
DDR0_M_Data[20
]
DDR0_M_Data[31
]
DDR0_M_Data[28
]
DDR0_M_Data[30
]
DDR0_M_Data[25
]
DDR0_M_Data[27
]
DDR0_M_Data[34
]
DDR0_M_Data[32
]
DDR0_M_Data[39
]
DDR0_M_Data[37
]
DDR0_M_Data[36
]
DDR0_M_Data[47
]
DDR0_M_Data[44
]
DDR0_M_Data[46
]
DDR0_M_Data[41
]
DDR0_M_Data[43
]
DDR0_M_Data[50
]
DDR0_M_Data[48
]
DDR0_M_Data[55
]
DDR0_M_Data[53
]
DDR0_M_Data[52
]
DDR0_M_Data[63
]
DDR0_M_Data[62
]
DDR0_M_Data[60
]
DDR0_M_Data[57
]
DDR0_M_Data[59
]
DDR0_M_Data[6]
DDR0_M_Data[3]
DDR0_M_Data[1]
DDR0_M_Data[10
]
DDR0_M_Data[8]
DDR0_M_Data[13
]
DDR0_M_Data[22
]
DDR0_M_Data[19
]
DDR0_M_Data[17
]
DDR0_M_Data[26
]
DDR0_M_Data[24
]
DDR0_M_Data[29
]
DDR0_M_Data[38
]
DDR0_M_Data[35
]
DDR0_M_Data[33
]
DDR0_M_Data[42
]
DDR0_M_Data[40
]
DDR0_M_Data[45
]
DDR0_M_Data[54
]
DDR0_M_Data[51
]
DDR0_M_Data[49
]
DDR0_M_Data[58
]
DDR0_M_Data[56
]
DDR0_M_Data[61
]
DDR0_M_Data[5]
DDR0_M_Data[7]
DDR0_M_Data[2]
DDR0_M_Data[0]
DDR0_M_Data[15
]
DDR0_M_Data[4]
DDR0_M_Data[9]
DDR0_M_Data[14
]
DDR0_M_Data[12
]
DDR0_M_Data[11]
DDR0_M_Data[23
]
DDR0_M_Data[16
]
DDR0_M_Data[18
]
DDR0_M_Data[21
]
DDR0_M_Data[31
]
DDR0_M_Data[20
]
DDR0_M_Data[25
]
DDR0_M_Data[30
]
DDR0_M_Data[28
]
DDR0_M_Data[27
]
DDR0_M_Data[39
]
DDR0_M_Data[32
]
DDR0_M_Data[34
]
DDR0_M_Data[37
]
DDR0_M_Data[47
]
DDR0_M_Data[36
]
DDR0_M_Data[41
]
DDR0_M_Data[46
]
DDR0_M_Data[44
]
DDR0_M_Data[43
]
DDR0_M_Data[55
]
DDR0_M_Data[48
]
DDR0_M_Data[50
]
DDR0_M_Data[53
]
DDR0_M_Data[63
]
DDR0_M_Data[52
]
DDR0_M_Data[59
]
DDR0_M_Data[57
]
DDR0_M_Data[60
]
DDR0_M_Data[62
]
DDR0_M_Data[1]
DDR0_M_Data[3]
DDR0_M_Data[6]
DDR0_M_Data[10
]
DDR0_M_Data[13
]
DDR0_M_Data[8]
DDR0_M_Data[22
]
DDR0_M_Data[17
]
DDR0_M_Data[19
]
DDR0_M_Data[29
]
DDR0_M_Data[24
]
DDR0_M_Data[26
]
DDR0_M_Data[33
]
DDR0_M_Data[35
]
DDR0_M_Data[38
]
DDR0_M_Data[40
]
DDR0_M_Data[42
]
DDR0_M_Data[45
]
DDR0_M_Data[51
]
DDR0_M_Data[54
]
DDR0_M_Data[49
]
DDR0_M_Data[56
]
DDR0_M_Data[58
]
DDR0_M_Data[61
]
DDR_DATA[5 ]
DDR_DATA[7 ]
DDR_DATA[0 ]
DDR_DATA[2 ]
DDR_DATA[15]
DDR_DATA[4 ]
DDR_DATA[9 ]
DDR_DATA[11 ]
DDR_DATA[14]
DDR_DATA[12]
DDR_DATA[21]
DDR_DATA[18]
DDR_DATA[16]
DDR_DATA[23]
DDR_DATA[31]
DDR_DATA[20]
DDR_DATA[27]
DDR_DATA[28]
DDR_DATA[30]
DDR_DATA[25]
DDR_DATA[37]
DDR_DATA[34]
DDR_DATA[32]
DDR_DATA[39]
DDR_DATA[47]
DDR_DATA[36]
DDR_DATA[43]
DDR_DATA[44]
DDR_DATA[46]
DDR_DATA[41]
DDR_DATA[53]
DDR_DATA[50]
DDR_DATA[48]
DDR_DATA[55]
DDR_DATA[63]
DDR_DATA[52]
DDR_DATA[59]
DDR_DATA[57]
DDR_DATA[60]
DDR_DATA[62]
DDR_DATA[1 ]
DDR_DATA[3 ]
DDR_DATA[6 ]
DDR_DATA[10]
DDR_DATA[8 ]
DDR_DATA[13]
DDR_DATA[22]
DDR_DATA[19]
DDR_DATA[17]
DDR_DATA[29]
DDR_DATA[24]
DDR_DATA[26]
DDR_DATA[33]
DDR_DATA[35]
DDR_DATA[38]
DDR_DATA[42]
DDR_DATA[45]
DDR_DATA[40]
DDR_DATA[54]
DDR_DATA[49]
DDR_DATA[51]
DDR_DATA[58]
DDR_DATA[61]
DDR_DATA[56]
DDR0_M_Data[0]
DDR0_M_Data[2]
DDR0_M_Data[7]
DDR0_M_Data[5]
DDR0_M_Data[4]
DDR0_M_Data[15
]
DDR0_M_Data[9]
DDR0_M_Data[11]
DDR0_M_Data[12
]
DDR0_M_Data[14
]
DDR0_M_Data[23
]
DDR0_M_Data[21
]
DDR0_M_Data[18
]
DDR0_M_Data[16
]
DDR0_M_Data[20
]
DDR0_M_Data[31
]
DDR0_M_Data[25
]
DDR0_M_Data[27
]
DDR0_M_Data[28
]
DDR0_M_Data[30
]
DDR0_M_Data[39
]
DDR0_M_Data[37
]
DDR0_M_Data[34
]
DDR0_M_Data[32
]
DDR0_M_Data[36
]
DDR0_M_Data[47
]
DDR0_M_Data[41
]
DDR0_M_Data[43
]
DDR0_M_Data[44
]
DDR0_M_Data[46
]
DDR0_M_Data[55
]
DDR0_M_Data[53
]
DDR0_M_Data[50
]
DDR0_M_Data[48
]
DDR0_M_Data[52
]
DDR0_M_Data[63
]
DDR0_M_Data[62
]
DDR0_M_Data[60
]
DDR0_M_Data[57
]
DDR0_M_Data[59
]
DDR0_M_Data[6]
DDR0_M_Data[3]
DDR0_M_Data[1]
DDR0_M_Data[10
]
DDR0_M_Data[8]
DDR0_M_Data[13
]
DDR0_M_Data[22
]
DDR0_M_Data[19
]
DDR0_M_Data[17
]
DDR0_M_Data[26
]
DDR0_M_Data[24
]
DDR0_M_Data[29
]
DDR0_M_Data[38
]
DDR0_M_Data[35
]
DDR0_M_Data[33
]
DDR0_M_Data[42
]
DDR0_M_Data[40
]
DDR0_M_Data[45
]
DDR0_M_Data[54
]
DDR0_M_Data[51
]
DDR0_M_Data[49
]
DDR0_M_Data[58
]
DDR0_M_Data[56
]
DDR0_M_Data[61
]
DDR0_ADDR[10]
DDR0_ADDR[0]
DDR0_ADDR[1]
DDR0_ADDR[2]
DDR0_ADDR[3]
DDR0_ADDR[4]
DDR0_ADDR[5]
DDR0_ADDR[6]
DDR0_ADDR[7]
DDR0_ADDR[8]
DDR0_ADDR[9]
DDR0_ADDR[11]
DDR0_ADDR[12]
DDR0_ADDR[12]
DDR0_ADDR[11]
DDR0_ADDR[8]
DDR0_ADDR[9]
DDR0_ADDR[4]
DDR0_ADDR[6]
DDR0_ADDR[7]
DDR0_ADDR[5]
DDR0
_ADDR
[3]
DDR0
_ADDR
[2]
DDR0
_ADDR
[1]
DDR0
_ADDR
[0]
DDR0_ADDR[0]
DDR0_ADDR[1]
DDR0_ADDR[2]
DDR0_ADDR[3]
DDR0_ADDR[4]
DDR0_ADDR[5]
DDR0_ADDR[6]
DDR0_ADDR[7]
DDR0_ADDR[8]
DDR0_ADDR[9]
DDR0_ADDR[11]
DDR0_ADDR[12]
DDR
0_ADD
R
[3]
DDR
0_ADD
R
[2]
DDR
0_ADD
R
[1]
DDR
0_ADD
R
[0]
DDR0_ADDR[12]
DDR0_ADDR[11]
DDR0_ADDR[9]
DDR0_ADDR[8]
DDR0_ADDR[7]
DDR0_ADDR[6]
DDR0_ADDR[5]
DDR0_ADDR[4]
DDR0_ADDR[0]
DDR0_ADDR[1]
DDR0_ADDR[2]
DDR0_ADDR[3]
DDR0_ADDR[4]
DDR0_ADDR[5]
DDR0_ADDR[6]
DDR0_ADDR[7]
DDR0_ADDR[8]
DDR0_ADDR[9]
DDR0_ADDR[11]
DDR0_ADDR[12]
DDR0_
A
DD
R[10
]
DDR0_ADDR[10]
DDR0_ADDR[10]
DDR0_
A
DD
R[10
]
DDR0_ADDR[12]
DDR0_ADDR[11]
DDR0_ADDR[9]
DDR0_ADDR[4]
DDR0_ADDR[3]
DDR0_ADDR[1]
DDR0_ADDR[2]
DDR0_ADDR[6]
DDR0_ADDR[8]
DDR0_ADDR[7]
DDR0_ADDR[5]
DDR0_ADDR[10]
DDR0_ADDR[0]
DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[8]
DDR0_DQ[9]
DDR0_DQ[13]
DDR0_DQ[15]
DDR0_DQ[14]
DDR0_DQ[12]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[24]
DDR0_DQ[16]
DDR0_DQ[17]
DDR0_DQ[21]
DDR0_DQ[27]
DDR0_DQ[23]
DDR0_DQ[26]
DDR0_DQ[22]
DDR0_DQ[28]
DDR0_DQ[25]
DDR0_DQ[20]
DDR0_DQ[30]
DDR0_DQ[18]
DDR0_DQ[31]
DDR0_DQ[29]
DDR0_DQ[19]
DDR0_DQ[40]
DDR0_DQ[32]
DDR0_DQ[33]
DDR0_DQ[37]
DDR0_DQ[43]
DDR0_DQ[39]
DDR0_DQ[42]
DDR0_DQ[38]
DDR0_DQ[44]
DDR0_DQ[41]
DDR0_DQ[36]
DDR0_DQ[46]
DDR0_DQ[34]
DDR0_DQ[47]
DDR0_DQ[45]
DDR0_DQ[35]
DDR0_DQ[56]
DDR0_DQ[48]
DDR0_DQ[49]
DDR0_DQ[53]
DDR0_DQ[59]
DDR0_DQ[55]
DDR0_DQ[58]
DDR0_DQ[54]
DDR0_DQ[60]
DDR0_DQ[57]
DDR0_DQ[52]
DDR0_DQ[62]
DDR0_DQ[50]
DDR0_DQ[63]
DDR0_DQ[61]
DDR0_DQ[51]
DDR
K
0
7
4
4
3
8
R
K
0
1
4
5
8
R
COMP1_S
W
1:H
4
K
0
7
4
9
4
7
R
COMP1_P
b
6:Y1
3
GND
RGB_H
S
6:Y1
4
5.6K
R817
AV_R_IN_2
5:C2
COMP_R_IN_
1
5:C
2
PPJ209-0
2
J700
4
A
[GN]CONT
AC
T
2
A
[GN]1P_CA
N
3
A
[GN]O_SPRIN
G
2
B
[BL]1P_CA
N
5
B
[B
L
]C_
L
UG_
L
2
C
[RD]1P_CAN
1
5
C
[RD]C_LUG_
L
2
D
[WH]1P_CA
N
5
D
[WH]C_LUG_
L
2
E
[RD]1P_CAN
2
4E
[RD]CONT
AC
T
3
E
[RD]
O
_
SP
RING
RGB_
G
6:Y1
4
22
R843
K
6.
5
6
4
7
R
5.6K
R816
1uF
C73
5
5.6K
R858
COMP1_
Y
6:Y1
3
/W_PROTEC
T
4:H2;6:A B28;6:A B24;6:A B21
4.7
K
R86
7
AV_R_IN_1
5:C2
22pF
C718
COMP2_P
b
6:Y1
2
K
0
7
4
2
6
8
R
K
0
7
4
5
0
8
R
+9V
S-VIDEO2_L
6:Y11
100pF
C703
1uF
C732
4.7
K
R86
8
S-VIDEO1_C
6:Y12
D_EYE
4:C3
S-VIDEO1_L
6:Y12
P P J 2 0 0 - 0
7
J 7 04
3A
2A
4A
2B
5B
COMP2_S
W
1:H
4
COMP2_
Y
6:Y1
3
GND
1uF
C73
4
MNT_L_OUT6:AM4
1uF
C728
RGB_
R
6:Y1
5
PMJ029-01
J701
4A
[YL]CONTAC T
2A
[Y L]1P_CAN
3A
[YL]0_SPRING
2B
[WH]1P_CAN
5B
[WH]C_LUG_L
2C
[RD]1P_CAN
4C
[RD]CONTACT
3C
[RD]0_SPRING
6
[S-VHS]GROUND_TER
7A
[S-VHS]C_LUG_L1
7B
[S-VHS]C_LUG_L2
7C
[S-VHS]C_LUG_L3
7D
[S-VHS]C_LUG_L4
8
[S-VHS]0_SPRING
GND
1uF
C73
6
5.6K
R838
K
0
7
4
3
6
8
R
470K
R836
RGB_L_IN
5:A2
COMPOSITE1_S
W
1:H3
GND
1uF
C73
7
RGB_V
S
6:Y1
4
4
9
0
-
1
7
0
7
-
3
0
A
1
0
7
P
1
2
3
4
5
6
7
8
9
10
1
1
2
1
3
1
14
15
1
6
1uF
C733
GND
K
6.
5
9
2
8
R
+5.0V
GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE
S
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC
.
K
0
7
4
0
3
8
R
GND
SMW200-14
P700
1
2
3
4
5
6
7
8
9
10
11
12
13
14
K
0
7
4
7
4
7
R
CO
M
P
2
_
P
r
6:Y1
2
CO
M
P
1
_
P
r
6:Y1
3
K
6.
5
3
3
8
R
22
R839
S-VIDEO2_S
W
1:H2
DDC_SC
L
4:D3
COMP_R_IN_
2
5:C
2
S-VIDEO1_S
W
1:H5
GND
5.6K
R859
22pF
C717
PPJ209-0
2
J702
4
A
[GN]CONT
AC
T
2
A
[GN]1P_CA
N
3
A
[GN]O_SPRIN
G
2
B
[BL]1P_CA
N
5
B
[B
L
]C_
L
UG_
L
2
C
[RD]1P_CAN
1
5
C
[RD]C_LUG_
L
2
D
[WH]1P_CA
N
5
D
[WH]C_LUG_
L
2
E
[RD]1P_CAN
2
4E
[RD]CONT
AC
T
3
E
[RD]
O
_
SP
RING
GND
COMP_L_IN_
2
5:A2
5.6K
R837
GND
RGB_S
W
1:H2
PEJ024-0
1
J703
6B
T_TERMINAL2
8
SHIELD_PLATE
7B
B_TERMINAL2
5
T_SPRING
4
R_SPRING
7A
B_TERMINAL1
6A
T_TERMINAL1
3
E_SPRING
S-VIDEO2_C
6:Y11
GND
COMPOSITE1_I
N
6:Y10
0.1uF
C730
READY
GND
22
R860
RGB_R_IN
5:C2
AV_L_IN_ 1
5:A2
0 . 1 u F
C724
100pF
C702
COMP_L_IN_
1
5:A2
1uF
C729
K
0
7
4
3
5
7
R
MNT_R_OUT
6:AM4
K
6.
5
2
5
7
R
AV_L_IN_ 2
5:A2
DDC_SDA
4:D3
KRC102S
Q700
E
B
C
GND
1uF
C701
COMPOSITE2_I
N
6:Y10
GND
1K
R873
RGB_
B
6:Y1
4
1uF
C700
K
0
1
7
4
8
R
+5.0V
COMPOSITE2_S
W
1:H4
22
R861
GND
100pF
C727
100pF
C726
470K
R835
0
R814
0
R755
0
R815
75
R81
8
75
R81
9
75
R82
0
FI-A2012-271KJ
T
L70
2
FI-A2012-271KJ
T
L70
1
FI-A2012-271KJ
T
L70
0
27p
F
C70
8
27p
F
C70
5
27p
F
C70
9
27p
F
C70
4
27p
F
C70
7
27p
F
C70
6
75
R798
75
R794
75
R750
FI-A2012-271KJ
T
L70
4
FI-A2012-271KJ
T
L70
6
FI-A2012-271KJ
T
L70
5
27p
F
C71
5
27p
F
C71
4
27p
F
C71
0
27p
F
C71
3
27p
F
C71
1
27p
F
C71
2
75
R832
75
R823
75
R827
75
R84
0
75
R84
2
75
R84
1
75
R85
2
75
R85
3
75
R85
1
3216
0
R700
GND
GND
GND
0
R855
0
R856
0
R857
27pF
50V
C738
27pF
50V
C739
27pF
50V
C740
R875
READY
100pF
C720
100pF
C719
0
R844
0
R846
0
R845
AT24C02BN-10SU-1.
8
IC701
3
A2
2
A1
4
GND
1
A0
5
SDA
6
SCL
7
WP
8
VCC
0 . 0 1 u F
C716
100uF
C731
READY
HH-1M 2012-121
READY
L703
JP700
JP701
JP702
JP703
JP704
JP705
JP706
JP70
7
JP70
8
JP709
JP71
0
JP711
JP712
JP713
JP714
JP715
JP716
JP717
JP718
JP719
JP720
JP721
JP722
JP723
JP72
4
JP72
5
JP72
6
JP72
7
JP72
8
JP72
9
JP73
0
JP73
1
JP73
2
JP73
3
JP73
4
JP735
JP736
JP737
JP738
JP739
JP740
JP741
JP742
JP743
JP744
ZD708
ZD70
7
ZD70
2
ZD70
0
ZD70
1
ZD709
5.1
V
ZD73
2
5.1V
ZD733
5.1V
ZD736
0 . 0 1 u F
50V
READY
C741
82
READY
R720
82
READY
R702
82
READY
R721
ZD71
5
ZD71
3
ZD71
1
ZD71
2
ZD71
0
ZD71
4
ZD73
4
ZD73
7
ZD73
8
0 . 0 1 u F
50V
READY
C748
82
READY
R722
82
READY
R705
82
READY
R723
ZD705
ZD71
8
ZD70
6
ZD70
3
ZD71
7
ZD704
ZD71
6
ZD73
5
ZD739
ZD740
ZD721
ZD723
ZD722
ZD741
ZD742
ZD743
ZD720
ZD719
ZD729
ZD727
ZD724
ZD731
ZD728
ZD730
ZD726
ZD725
ZD744
ZD745
ZD746
ZD747
ZD748
ZD749
ZD750
TP190
6.8
K
R70
7
2SC3875
S
Q702
E
B
C
GND
1K
R72
5
TP188
2SC3875
S
Q701
E
B
C
15
K
R71
0
1K
R72
8
TP187
10uF
16V
C742
6.8
K
R71
2
2SC3875
S
Q703
E
B
C
0 . 1 u F
16V
C743
22
R729
120OHM
L708
TP189
22
R714
GND
0 . 1 uF
16V
C744
TP191
+9V
GND
15
K
R71
5
15
K
R73
0
1K
R71
7
TP186
GND
6.8
K
R73
1
22
R727
10uF
16
V
C74
5
10uF
16
V
C74
6
10uF
16
V
C74
7
JP745
INPUT CONNECTOR
1K
R484
470
R510
READY
470
R509
READY
1K
R46
2
0 . 1 u F
C418
GND
470
R519
READY
RL_ON
J 7 ; 8 : I6
D3.3V
AT24C512W-10SI-2.
7
IC403
3
NC
2
A1
4
GND
1
A0
5
SDA
6
SCL
7
WP
8
VCC
0 . 1 u F
C429
0 . 1 u F
C417
0 . 1 u F
C425
10uF
C419
24MHz
X400
SDA3_3.3
V
1:H1;9:A
6
GND
KEY2
B3
GND
SYS_RESE
T
10:AC4
L401
6.8
K
R47
3
3.3
K
R47
4
3.3VST_MICO
M
0 . 1 u F
C428
GND
22
R435
AC_DET
8 : I 6
DDC_SDA
7 : J2
KEY2
H2
UCOM_RX
A4
+3.3V
DISP_E
N
9 : A 6 ; 9 : E3
1K
READ
Y
R48
7
1K
R44
4
OP
T
M i c o m O p t i o n 3 P i n _ L o
w
R44
1
RL_ON_3.3
H7
VBR_
A
8:H
6
1K
R483
47
K
R44
8
L404
3.3VST_MICO
M
22
R446
1K
R498
BCM_RX
1:H2
0 . 1 u F
C408
GND
0 . 1 u F
C416
0 . 1 u F
C436
22
R457
0
R505
SDA2_3.3V
1 : A 2 ; 1 : H 1 ; 5 : A 5 ; 9 : E4
6.8
K
R47
1
0 . 1 u F
C412
D3.3V
D3.3V
K
7.
4
Y
D
A
E
R
9
3
4
R
K
0
1
2
5
4
R
6.8K
R478
3.3VST_MICO
M
GND
GND
ST_5V
KEY1
B2
L406
READY
4.7K
R516
READY
LED_
G
B1
22
R470
5V_MNT
8:H
6
D_EYE
7:G7
1K
R44
7
POD
8:H6
4.7K
R458
JTAG_RESET
b
2 : E1
GND
0.1uF
C431
GND
LED_G
F5
68
0
R43
1
470
R511
READY
220
R449
2SC3875
S
Q406
READY
E
B
C
4.7
K
R
4
5
3
GND
10uF
C405
D3.3V
KIA7029AF
IC405
2
G
3
O
1
I
KIA7029AF
IC400
2
G
3
O
1
I
1K
R40
0
KEY1
H2
LED_R
F5
0
READY
R438
AT24C16AN-10SI-2.
7
IC406
3
A2
2
A1
4
GND
1
A0
5
SDA
6
SCL
7
WP
8
VCC
0 . 1 u F
C402
SMW200-12
P401
1
2
3
4
5
6
7
8
9
10
11
12
10
0
READ
Y
R41
9
0 . 1 u F
C437
2SC3875
S
Q403
READY
E
B
C
0 . 1 u F
C415
BCM_TX
1:H2
INV_ON/OFF_3.3
H3
22
R455
1K
R450
1K
R46
4
GND
L405
MUTE2
6:AO2
2
22
R436
ST_5V
A Z1117H-3.3
IC404
2
OUTPUT
3
INPUT
1
ADJ/GND
GND
INV_ON/OFF
H 6 ; 8 : I6
4.7K
R514
READY
470
R520
READY
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE
S
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC
.
D3.3V
1K
M i c o m Op t i o n 3 Pi n - H i g h
R44
0
L402
4.7K
R443
D3.3V
0
R504
1K
R482
1K
READ
Y
R41
8
SKHMPWE01
0
SW400
1
2
43
5
UCOM_RX
C3
R513
READY
SCL3_3.3
V
1:H1;9:A
6
22
R469
ST_5V
LED_
R
B2
2SC3875
S
Q404
READY
E
B
C
74LVC14APW
IC401
3
2A
2
1Y
4
2Y
1
1A
6
3Y
5
3A
7
GND
8
4Y
9
4A
10
5Y
11
5A
12
6Y
13
6A
14
VCC
GND
220pF
C410
RL_ON_3.3
H3
GND
GND
R506
READY
0 . 1 u F
C411
0 . 1 u F
C413
GND
22pF
C433
POWER_CTL_2.6V_1.2
V
8:E1;8:
G
3
;8:
H
1
2SC3875
S
Q405
READY
E
B
C
LIVE_ON_3.3
H7
POWER_CTL_3.3
V
8:A7
INV_ON/OFF
J 7 ; 8 : I6
KDS184
D403
2
A
C
1
A
2SC3875
S
Q400
E
B
C
22uF
C406
10
0
LCD
R48
8
GND
220pF
C409
10uF
C424
SYS_RESET
b
1 : D 6 ; 2 : B 3 ; 8 : A 3 ; 11 : O 11
LIVE_ON
J7 ; 8 :H 7
K
1
5
7
4
R
GND
3.3VST_MICO
M
0 . 1 u F
C432
GND
MUTE1
5:A4
HDMI_CE
C
6:L2
6
GND
2SC3875
S
Q402
READY
E
B
C
ST_5V
L407
READY
1K
R500
RL_ON
H 6 ; 8 : I6
33K
R499
A02-0915-10
1
P400
1
2
3
4
5
6
7
8
9
10
+5.0V
GND
INV_ON/OFF_3.
3
H7
10uF
C401
MTV416GMF
IC407
1
HSYNC/P1.5
2
VSYNC/P1.6
3
P1.7/SOG
I
4
RST
5
HSCL1/P3.0/RX
D
6
P4.3/AD 3
7
HSDA1/P3.1/TXD
8
P 3 . 2 / I N T0
9
P 3 . 3 / I N T1
10
I S D A / P 3 . 4 / T0
11
I S C L / P 7 .5
12
HSDA2
/P7.
4
13
HSCL2/P7.
3
14
X2
15
X1
16
VS
S
17
P4
.0
/A
D
0
18
P6.0
/C
L
KO1
19
P6.
1
20
P6.
2
21
P6.
3
22
P6.
4
23
P 6. 5
24
P 6. 6
25
P 6. 7
26
P7.2/HCLAMP
27
P7.1/VBLANK
28
P4.1/AD 1
29
P7.0/HBLANK
30
P5.7/CL KO2
31
P 5. 6
32
P 5. 5
33
P 5. 4
34
P5.
3
35
P5.
2
36
P5.
1
37
P5.
0
38
VD
D
39
P4
.2/
A
D
2
40
P1.0/ET
2
41
P1
.1/
D
A
0
42
P1
.2/
D
A
1
43
P1
.3/
D
A
2
44
P1
.4/
D
A
3
1K
R481
22
R445
3.3VST_MICO
M
GND
SDC15
D402
A1
C
A2
1K
R485
AI_ON/OFF
9 : A 5 ; 9 : E4
+5.0V
3.3VST_MICO
M
SDC15
D401
A1
C
A2
100K
R508
READY
3.3VST_MICO
M
0 . 1 u F
C414
100K
R502
READY
DDC_SC
L
7 : J2
GND
2SC3875
S
Q401
READY
E
B
C
GN
D
KDS184
D404
2
A
C
1
A
ST_5V
SCL2_3.3V
1 : A 2 ; 1 : H 1 ; 5 : A 5 ; 9 : E4
470
R521
READY
/W_PROTEC
T
6 : A B 2 8 ; 6 : A B 2 4 ; 6 : A B 2 1 ; 7 : I3
0
R503
15K
R463
LIVE_ON_3.3
H3
1K
R451
I R
B2
0 . 1 u F
C426
I R
C3
4.7K
R512
READY
GND
LIVE_ON
H6;8:H7
330
R430
ST_5V
L403
0
R437
MICOM_RESE
T
5 : A 6 ; 5 : G1
0 . 1 u F
C435
1K
R496
LVDS_PANEL_CTRL9:G5
68K
R492
GND
100K
R507
READY
22pF
C434
VBR_B_EX
T
9:B5;9:E
5
0
READY
R459
ADM3232E
ARNZ
IC402
3
C1-
2
V+
4
C2+
1
C1+
6
V -
5
C2-
7
T2OUT
8
R2IN
9
R2OUT
10
T2IN
11
T1IN
12
R1OUT
13
R1IN
14
T1OUT
15
GND
16
VCC
4.7
K
R48
9
4.7K
R491
100
R416
100
R417
3.3VST_MICO
M
0 . 1 u F
C407
0 . 1 u F
C404
0 . 1 u F
C403
0 . 1 u F
C420
HH-1M 2012-121
L400
33K
R466
J P 4 00
J P 4 01
J P 4 02
J P 4 03
J P 4 04
J P 4 05
J P 4 06
J P 4 07
J P 4 08
4.7K
R422
4.7K
R423
3.3VST_MICO
M
10
K
R43
3
J P 4 09
LCD Module Only
NVRAM
RESE
T
Ser i a l P o rt
RxD
TxD
P D P :
L C D :
MICOM, TTL
GND
LED G
GND
GND
GND
5V_ST
GND
GND
KEY2
KEY1
I R
LED R
D e t e c t + 3 . 3 V f o r P o w e r S e q u e n c e ( B C M 1 . 2 V, 2 . 6 V, 3 . 3 V
)
LVDS_TX_
1 : B 5 ; E5
4.7K LCD
R939
LVDS_TX_OUT_TA2-
1 : B 5 ; E5
LVDS_TX_
1 : B 4 ; E4
SCL3_3.3V
1 : H 1 ; 4 : F1
0
WXGA_LCD
R966
0 . 1 u F
C900
GND
LVDS_TX_
1:B4
GND
0
READY
R971
LVDS_TX_
1:B5;A4
22
READY
R947
LVDS_TX_
1:B5
0
WXGA
R951
10
WXGA_LPL
R923
+12.0V
22
READY
R936
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE
S
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC
.
LVDS_TX_
1:B5;A3
LVDS_TX_OUT_TB3-
1:B5
AI_ON/OFF
D3.3V
22
READY
R937
D3.3V
VBR_B_HD
8 : H 6 ; 8 : I6
0 READY
R942
VBR_B_EXT
4 :F5 ; E5
LVDS_TX_
1:B5;A3
DISP_EN
4:H3;E3
LVDS_TX_OUT_TA1-
1 : B 5 ; E4
FI-R51S-HF
FHD
P903
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
LVDS_TX_OUT_TB2-
1:B5
1K
READY
R945
LVDS_TX_
1:B5
4.7K
READY
R934
READY
R940
VBR_B_EXT
4 :F5 ; B5
LVDS_TX_OUT_TBC-
1:B4
1K
R944
SDA2_3.3V
0
READY
R970
0 . 1 u F
C901
LVDS_TX_
1 : B 5 ; E4
0
WXGA_LCD
R968
GND
0
LCD R943
LVDS_TX_
1:B4;A3
LVDS_TX_
1:B5;A3
0
READY
R953
LVDS_TX_OUT_TA4-
1 : B 5 ; E4
GND
0
WXGA_LCD
R967
GIL- G-03-S3T2
DAC B/D Power
P901
1
2
3
GND
SDA3_3.3V
1 : H 1 ; 4 : F1
VBR_B_FHD
8:H6
GND
GND
FI-X30SSL-HF
WXGA_WAFER
P900
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
LVDS_TX_OUT_TA1-
1:B5;A3
100
WXGA_LCD
R963
DISP_EN
4:H3;A6
0
READY
R949
LVDS_TX_
1 : B 5 ; E4
0
WXGA
R952
WXGA_LCD_12V
A 2 ; I 6
0
READY
R969
100pF
WXGA
C906
0
READY
R950
0
READYR941
LVDS_TX_
1:B4
1K
READY
R938
GN
D
22
R946
LVDS_TX_OUT_TB0-
1:B5
4.7K
READY
R903
LVDS_TX_OUT_TA3-
1 : B 5 ; E4
LVDS_TX_
1:B5
LVDS_TX_
1 : B 5 ; E4
LVDS_TX_OUT_TA0-
1 : B 5 ; E5
LVDS_TX_OUT_TA2-
1:B5;A3
0
WXGA_LCD
R965
LVDS_TX_OUT_TAC-
1:B4;A3
LVDS_TX_
1 : B 5 ; E5
D3.3V
LVDS_TX_OUT_TAC-
1 : B 4 ; E4
LVDS_TX_
1:B5;A4
LVDS_TX_OUT_TA4-
1:B5;A4
100
READY
R964
LVDS_TX_OUT_TA3-
1:B5;A4
LVDS_TX_
1:B5
LVDS_TX_OUT_TB4-
1:B5
LVDS_TX_OUT_TB1-
1:B5
0
R935
AI_ON/OFF
4 : C 3 ; E4
D3.3V
SCL2_3.3V
LVDS_TX_OUT_TA0-
1:B5;A3
WXGA_LCD_12V
E 3 ; I6
2SC3875
S
Q900
E
B
C
GND
GND
WXGA_LCD_12V
A2;E3
47uF
25V
C904
SI4925BDY
Q901
3
S2
2
G1
4
G2
1
S1
5
D2_1
6
D2_2
7
D1_1
8
D1_2
1K
R932
+12.0V
0 . 1 u F
50V
C902
LVDS_PANEL_CTRL
4:H3
L900
L901
47K
R933
47
K
R97
2
8200p
F
50
V
C90
7
ONLY FOR PDP
42" FUll HD(WCG) : NOT Assembl
e
LVDS OUTPUT(Full HD)
LVDS OUTPUT(WXGA)
3 7 " 4 7 " F Ul l H D : A s se mbl e
ONLY FOR LCD
T h i s P o i n t M u s t b e c h e c k e d
.
FOR PANEL POWER SEQUENCE T1 TIMIN
G
FOR PANEL POWER SEQUENCE T1 TIMIN
G
FOR PANEL POWER SEQUENCE T1 TIMING
0 . 1 U / 1 6 V - - > 0 . 1 U / 5 0
V
47U/16V --> 47U/25V
