LGE Internal Use Only
Copyright © 2007 LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 24 -
BU9580
FMI_DATA[ 0
- 15 ]
Buf f er
ATA_DATA
Buf f er
FMI_A
FMIREQ
FMIGNT
ATA_A
ATA_DIOW
ATA_DIOR
HDD
( SATA)
TXP/ TXN
RXP/ RXN
UPD64015
d ec o d er
UPD61151
en c o d er
656 _DATA
DVR_V/ Y OUT
DVR_C OUT
SCART1_DVR_R/ G/ B
SCART1_DVR_FB
SDRAM
2MB
SDRAM
8MB
SDRAM
8MB
CS5331A
53 31 _SDATA
53 31 _SCLK
53 31 _LPRK
SCART_AUDIO L/ R
MPENC_SDR_D
MPENC_SDR_A
VDEC_SDR_D
VDEC_SDR_A
MPENC_TS_D[ 0
- 7]
MPENC_TS_CLK
MPENC_TS_SYNC
MPENC_TS_TS_VAL
TDFG- G107P
74LCS157
IC601
IC602
IC603
FE_TS0_Dat a[ 0
- 7]
FE_TS0 _DATA_CLK
FE_TS0 _DATA_SYNC
FE_TS0 _DATA_VAL
TS0_Dat a[ 0
- 7]
TS0_DATA_CLK
TS0_DATA_SYNC
TS0_DATA_VAL
LRCLK_5100
SCLK_5100[ DTV]
SPDIF
PCMDATA_5100[ DTV]
Res is t o r
Tr
STI510 0
LDBA[ 0: 1 ] ( Bank Selec t )
LDDQM[ 0: 1] ( Dat a I/ O Mas k)
LDDQS[ 0: 1] ( Dat a St ro b e)
LDCS/ ( Chi p Selec t )
LDRAS/ ( Lat c h Ro w Ad d res s St ro b e)
LDCAS/ ( Lat c h Co lum n Ad d res s St ro b e)
LDWE/ ( Writ e En ab le)
LDCLKE( Clo c k En ab le)
LDCLK( Clo c k)
LDCLKN( Invert ed Clo c k)
TS0 _DATA[ 0 : 7]
TS0 _DATA_CLK
TS0 _DATA_VAL
TS0 _DATA_SYN
YUV_D[ 0 : 7]
YUV_PIXCLK
CI_EN/
CI_RST
I2 C_SDA0 / SCL0
I2C_SDA1 / SCL1
Array R
DIGIT_D[ 0 : 7]
CLK_DIGIT
EEPROM
TS_SEL/
DTV_AUDIO_MUTE
PIO_286
PIO_287
Tr
REC_B
FOR SCART PIN8
OUT_LEFT
OUT_RIGHT
CVBS
Buf f er
Buf f er
DTV_LOUT
DTV_ROUT
SP_CVBS
DTV_AUDIO_MUTE_BUF
( ST51 00 GPIO)
27M
32. 768Khz
Sys t em t i m e t o b e p res erved w hen m ain
p o w er is d i s c o nnec t ed
CPU_WAIT( Wai t inp u t ( Read / Writ e c yc le)
FMIGNT( DVB
- CI/ Cab le Card I/ O read St ro b e)
FMIREQ( DVB
- CI/ Cab le Card I/ O w ri t e St ro b e)
IRQ1
FMIWE/ ( Read n o t w rit e)
FMICS3 / ( Chip s elec t )
FMICS1 / ( Chip s elec t )
FMIBE1/ ( Byt e en ab le)
Flas h
( 8M)
DDR
( 512Mb it )
LDA[ 0 : 12 ]
LDD[ 0: 15]
FMI_A[ 1 : 25 ]
FMI_D[ 0: 1 5]
CXA2069
DTV/ MNT_LOUT
DTV/ MNT_ROUT
DTV/ MNT_VOUT
MUTE_LINE_DTV
( Co rt ez GPIO)
LRCLK_DTV
SPDIF_STI_OUT
SCLK_DTV
PCMDATA_DTV
Array R
IRQ2
FMILBA/ ( Flas h d evic e lo ad b u rs t ad d res s / DVB
- CI Cab le Card Wri t e Enab le)
FMIOE/ ( Out p ut en ab le/ DVB
- CI Cab le Card o ut p ut Enab le)
DVR
MPENC_TS__D [ 0 : 7 ]
MPENC_TS__CLK
MPENC_TS__VAL
MPENC_TS__SYN
MPENC_RESET_ST
2. DVR
3. STi5100 composition
