- 10 -
Copyright ©
LG Electronics. Inc. All rights reserved.
Only for training and service purposes.
IC101
Ma
in SOC
(P1801)
30P HD LVDS wa
fer
51P FHD LVDS wa
fer
(P1800)
CO
MP
2_Y+/Pb+/P
r+/L
_R
_I
N
or
AV_CVBS_I
N/L_R_
IN
CK+/-,
D0+/-,
D1+/-,
D2+/-_HDMI
2
DDC_SCL/SDA_2,
HD
MI
_C
EC
Serial
Flash
(IC1300)
SPI
_SCK
/SDI
/SDO/CS
System
EEPROM
(IC104)
I2C_SCL/SDA
RX
A0+/-~R
XA
4+
/-,
RX
ACK+/-
RX
B0+/-~RX
B4+/
-,
RX
BCK+/-
AGP
SPK_R
SPK_L
AM
P_SCL/SDA
AUD_LRCH,
AUD_LRCK,
AUD_SC
K
Audio AM
P
(IC5600)
Connector
(P5601)
HD
MI
1
(JK800)
USB (JK700)
DM
/DP
USB1_OCP/CTL
DC-DC,
OCP
(IC400)
+5V_USB
NAND
FLASH
(IC102)
PC
M_
A[0:7]
Buffer IC1902
TS
_DAT
A[0:7]
PC
M_
DATA[0:7]
EPH
Y_
TP/TN/RP/RN
LAN
(JK2100)
Only
UK
CO
MP
ONEN
T
(JK2601)
PC
M_
A[8:14]
X-
tal
TU_SCL
/ SDA
Tu
ner
(T
U3703)
IF
_N,
IF
_P,
IP
_S,
IM
_S,
QM
_S,
QP_S
IF
_AGC_S,
IF
_AGC
LN
B_
OUT
CI
SL
OT
(P1900)
REAR
SIDE
TU_CVBS,
SI
F
DE
MO
D_SCL/SDA
LNB
(IC2701)
LN
B_
OUT
HD
MI
2
(JK801)
SPDIF
Jack
SPD
IF
(JK1001)
Only
EU
SPD
IF
_OUT
One
KEY
, LED_R,
IR
, I2
C_Sensor
CK+/-,
D0+/-,
D1+/-,
D2+/-_HDMI
4
DDC_SCL/SDA_4,
HD
MI
_C
EC
BLOCK DIAGRAM
1.EU/CIS : T2/C/S2 : LJ51_V/U: LD76H
Summary of Contents for 32LJ51 Series
Page 53: ......
