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4-6-2-3 ► PCH-IO Conﬁ guration

PCI Express Conﬁ guration

Please refer section 4-6-2-3-1

SATA Conﬁ guration

Please refer section 4-6-2-3-2

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Summary of Contents for 2I640DW

Page 1: ...All In One Intel Elkhart Lake ATOM x6413E J6412 SoC CPU 2 x HDMI eDP 2 x M 2 3 x LAN 1 x Nano SIM USB COM Wide Range DC IN 9 24V NO 2I640DW Release date JUNE 10 2022 RISK OF EXPLOSION IF BATTERY IS REPLACED BY AN INCORRECT TYPE DISPOSE OF USED BATTERIES ACCORDING TO THE INSTRUCTIONS CAUTION ...

Page 2: ... MAP 2I640DW BOT 2 6 LIST OF JUMPERS 2 7 JUMPER SETTING DESCRIPTION 2 8 JSB1 CMOS DATA CLEAR 2 9 JAT1 POWER IN ALWAYS ON FUNCTION 2 10 JVL1 eDP PANEL POWER SELECT CHAPTER 3 CONNECTION 3 1 LIST OF CONNECTORS 3 2 CMOS BATTERY CONNECTOR 3 3 USB INTERFACE 3 4 LAN INTERFACE 3 5 COM INTERFACE 3 6 FRONT PANEL PIN HEADER 3 7 DIO INTERFACE 3 7 1 IO DEVICE F75111 CIO UTILITY 3 7 2 IO DEVICE F75111 CIO UTILI...

Page 3: ...N 4 6 ADVANCED 4 6 1 BOOT CONFIGURATION 4 6 2 SOC CONFIG CONFIGURATION 4 6 2 1 ACPI SETTINGS 4 6 2 2 SYSTEM AGENT SA CONFIGURATION 4 6 2 3 PCH IO CONFIGURATION 4 6 2 3 1 PCI EXPRESS CONFIGURATION 4 6 2 3 2 SATA CONFIGURATION 4 6 2 4 PCH FW CONFIGURATION 4 6 3 SIO F81804 4 6 3 1 UART PORT 1 CONFIGURATION 4 6 3 2 UART PORT 2 CONFIGURATION 4 6 3 3 HARWARE MONITOR 4 6 3 4 RESTORE ON POWER LOSS 4 6 4 N...

Page 4: ... keeps the rights in the subject to change the contents of this manual without prior notices in order to improve the function design performance quality and reliability The author assumes no responsibility for any errors or omissions which may appear in this manual nor does it make a commitment to update the information contained herein Trademarks Intel is a registered trademark of Intel Corporati...

Page 5: ...ease deal with heat dissipation properly when buying single MB set 9 Please avoid approaching the heat sink area to prevent users from being scalded with fanless products 12 It is important to install a system fan toward the CPU to decrease the possibility of overheating system hanging up issues or customer is suggested to have a ﬁne cooling system to dissipate heat from CPU 11 DO NOT apply any ot...

Page 6: ...PU if you change modify any parts of the CPU cooler 6 Please wear wrist strap and attach it to a metal part of the system unit before handling a component You can also touch an object which is ground connected or attached with metal surface if you don t have wrist strap 7 Please be careful to handle don t touch the sharp pointed components on the bottom of PCBA 8 Remove or change any components fo...

Page 7: ...3 2 1 3 1 2 3 Photo 1 Insert Unplug ...

Page 8: ... 3 0 and SATA 6 Gb s SATA III for SATA SSD interface M 2 B Key device with one channel DDR4 3200 MHz memory up to 32GB SODIMM slot and supports two serial ports RS232 RS485 RS422 jumper free auto switch by BIOS It supports 2 ports of USB 3 0 3 ports of USB 2 0 The expandable interfaces include 1 M 2 B Key for PCIe x 2 or SATA SSD auto detection and USB interface and 1 M 2 B Key PCIe x 2 and USB 3 ...

Page 9: ...1 up to 32GB 4 Support 3 x 10 100 1000 Mbps Intel LAN ports 5 Support 2 x RS232 selectable to RS485 RS422 by BIOS 6 2 x USB 3 0 and 3 x USB 2 0 7 Support extended 1 x M 2 B Key for PCIe x 2 SATA SSD auto detect and USB interface 1 x M 2 B Key for PCI2 x 2 and USB 3 0 2 0 interface with Nano SIM 8 Hardware digital Input Output 4 x DI 4 x DO Hardware Watch Dog Timer 0 255 sec programmable 9 Wide Ran...

Page 10: ...ith 10 100 1000 Mbps for PCIe x 1 V2 1 5 l O Chip Switch chipset for 2 ports RS232 RS422 RS485 selected by BIOS 6 USB 2 type A USB 3 0 3 USB 2 0 7 WDT DIO Hardware digital Input Output 4 x DI 4 x DO Option Hardware Watch Dog Timer 0 255 sec programmable 8 Expansion interface one M 2 B Key for PCIe x 2 SATA SSD auto detect and USB interface one M 2 B key for PCIe x 2 and USB 3 0 2 0 interface with ...

Page 11: ...7 1 3 Installing the SO DIMM 1 Align the SO DIMM with the connector at a 45 degree angle 2 Press the SO DIMM into the connector until you hear a click ...

Page 12: ...re designed to ensure the correct insertion If you feel resistance check t h e connectors golden ﬁnger direction and realign the card 2 Make sure the retaining clips on two sides of the slot lock onto the notches of the card ﬁrmly ...

Page 13: ...9 1 3 1 1 Removing the SO DIMM 1 Release the SO DIMM by pulling outward the two retaining clips and the SO DIMM pops up slightly 2 Lift the SO DIMM out of its connector carefully ...

Page 14: ...10 1 4 Directions for installing the M 2 B Key Mini Card 1 Unscrew the screw on the board 3 Gently push down the Mini Card and screw the screw back 2 Plug in the Mini Card in a 45 angle ...

Page 15: ...11 2 1 Dimension 2I640DW Chapter 2 ...

Page 16: ...12 2 2 Layout 2I640DW Connector and Jumper TOP CO1 CPI1 SODIM1 CIO1 CFP1 CC2 CC1 CBT1 CU6 CU8 JAT1 JSB1 NGFF1 NGFF2 CL1 CL2 CL3 HDMI1 HDMI2 eDP JVL1 DP1 DP2 CU7 ...

Page 17: ...13 2 2 1 Layout 2I640DW Connector and Jumper Bottom BOT CU2 CU1 SIM1 ...

Page 18: ...4DI 4DO Front Panel COM2 COM1 Battery Wafer USB 2 0 USB 2 0 Power IN Always ON CMOS Data Clear M 2 B Key 2242 PCIe x2 based SSD USB 2 0 SATA based SSD M 2 B Key 2242 3042 PCIe x2 based SSD USB 2 0 3 0 LAN1 LAN2 LAN3 HDMI1 HDMI2 eDP eDP Panel Power Select Display1 Display2 ...

Page 19: ...15 2 3 1 Layout 2I640DW Function MAP BOT USB 2 0 3 0 Nano SIM USB 2 0 3 0 ...

Page 20: ...16 2 4 Diagram 2I640DW TOP CO1 CPI1 SODIM1 CIO1 CFP1 CC2 CC1 CBT1 CU6 CU8 JAT1 JSB1 NGFF1 NGFF2 CL1 CL2 CL3 HDMI1 HDMI2 eDP JVL1 DP1 DP2 CU7 ...

Page 21: ...17 2 4 1 Diagram 2I640DW BOT CU2 CU1 SIM1 ...

Page 22: ...Front Panel COM2 COM1 Battery Wafer USB 2 0 USB 2 0 Power IN Always ON CMOS Data Clear M 2 B Key 2242 PCIe x2 based SSD USB 2 0 SATA based SSD M 2 B Key 2242 3042 PCIe x2 based SSD USB 2 0 3 0 LAN1 LAN2 LAN3 HDMI1 HDMI2 eDP eDP Panel Power Select Display1 Display2 TOP ...

Page 23: ...19 2 5 1 Function MAP 2I110D BOT USB 2 0 3 0 Nano SIM USB 2 0 3 0 ...

Page 24: ... is OFF as an open circuit without the plastic cap Some jumpers have three pins labeled 1 2 and 3 You could connect either pin 1 and 2 or 2 and 3 The below ﬁgure 2 2 shows the examples of diﬀerent jumper settings in this manual All jumpers already have its default setting with the plastic cap inserted as ON or without the plastic cap as OFF The default setting may be referred in this manual with a...

Page 25: ...e motherboard conﬁguration in CMOS RAM Close Pin1 and pin 2 of JSB1 to store the CMOS data To clear the CMOS follow the procedures below 1 Turn oﬀ the system and unplug the AC power 2 Remove DC IN power cable from DC IN power connector 3 Locate JSB1 and close pin 1 2 for few seconds 4 Return to default setting by Close pin 1 2 5 Connect DC IN power cable back to DC IN Power connector JSB1 1 1 2 2 ...

Page 26: ...SCRIPTION 1 2 Disabled 2 3 Enable 2 10 JVL1 eDP panel power select JVL1 DESCRIPTION 1 2 5V 2 3 3 3V JSB2 1 2 3 Disabled Enable 1 2 3 Note Attention Check Device Power in spec JVL1 1 2 3 5V 3 3V 1 2 3 NOTE Power always on function default is disabled ...

Page 27: ... 0mm wafer CFP1 Front Panel connector 2x5 pin 2 0mm wafer CIO1 4DI 4DO 2x5 pin 2 0mm wafer CO1 SMBus 1x4 pin 1 25mm wafer CPI1 DC IN 1x4 pin 2 0mm Red wafer EDP1 eDP 2x10 pin 1 25mm wafer SIM1 Nano SIM card socket SODIM1 DDR4 SODIMM H 9 2mm NGFF1 M 2 B key 2242 H 8 5 sockets 75 pin NGFF2 M 2 B key 2242 3042 H 8 5 sockets 75 pin HDMI1 HDMI typeA connector HDMI2 HDMI typeA connector DP1 DisplayPort ...

Page 28: ...24 3 2 CMOS battery connector Note NOTE CBT1 for external connector can extend battery capacity CBT1 CMOS Battery in 1x2 pin 1 25mm wafer PIN NO DESCRIPTION 1 Battery in GND 2 Battery in 3V CBT1 pin1 ...

Page 29: ... USB 3 0 TX 1 5V 2 USB 2 0 D 2 USB 3 0 TX 3 GND 3 USB 2 0 D 4 USB 3 0 RX 4 GND 5 USB 3 0 RX 5 USB 3 0 RX CU1 USB 3 0 2 0 CU2 USB 3 0 2 0 3 3 USB Interface CU6 CU7 CU8 USB 2 0 1x4 pin 1 25mm wafer PIN NO DESCRIPTION PIN NO DESCRIPTION 1 5V 2 DATA 3 DATA 4 GND CU8 CU7 pin1 CU6 pin1 ...

Page 30: ...2 NC 5 TD2 NC 6 TD1 RX 7 TD3 NC 8 TD3 NC Speed 10 Mbps 100 Mbps 1000 Mbps Indicate Link LED Active LED Link LED Active LED Link LED Active LED Light 3 4 LAN Interface CL1 LAN1 CL2 LAN2 CL3 LAN3 CL11 CL21 CL31 LAN signal out 2x4 pin 2 0mm wafer option PIN NO DESCRIPTION PIN NO DESCRIPTION 1 TR0 2 TR0 3 TR2 4 TR1 5 TR1 6 TR2 7 TR3 8 TR3 ...

Page 31: ... NC 10 5V RS422 Mode PIN NO DESCRIPTION PIN NO DESCRIPTION 1 TX 2 TX 3 RX 4 RX 5 GND 6 NC 7 NC 8 NC 9 NC 10 5V CC1 CC2 COM1 COM2 2x5 pin 2 0mm wafer CC1 CC2 pin1 10 Note 1 COM 1 2 Default RS232 RS485 RS422 by BIOS control 2 The pin9 RI can be modify to Power to supply device The power voltage can be set 12V or 5V The RI change Voltage function set by BOM control Default is RI signal 3 Pin 10 provi...

Page 32: ...n Header CFP1 Front Panel 2x5 pin 2 0mm wafer PIN NO Description PIN NO Description 1 Power button pin 2 Power button GND 3 Reset pin 4 Reset GND 5 Power LED 6 Power LED 7 HDD LED 8 HDD LED 9 LAN LED 10 LAN LED CFP1 pin1 10 ...

Page 33: ...WDT is enable the hardware start down counter to zero The reset timer have 10 20 tolerance upon the Temperature Note If want to SDK support Please contact to sales window CIO1 DIO 0 3 2x5 pin 2 0mm wafer PIN NO Description PIN NO Description 1 DI 0 2 DO 3 3 DI 1 4 DO 2 5 DI 2 6 DO 1 7 DI 3 8 DO 0 9 GND 10 5V 3 7 DIO Interface Note 1 DI pin default pull up 10KΩ to 5V 2 If use need isolate circuit t...

Page 34: ...st tool which DIx connect to DOx with Relay Source ﬁle CIO_Utility_Src_v3 0 5_w zip Binary ﬁle CIO_Utility_Bin_v3 0 5_x32_w zip CIO_Utility_Bin_v3 0 5_x64_w zip F75113 DLL F75113 dll http tprd info lexwiki index php IO_Device F75111_CIO_Utility 3 7 1 IO Device F75111 CIO Utility ...

Page 35: ...31 How to use this Demo Application ...

Page 36: ... vcredist_x86 exe when first time you run the F75111_DIO exe DEMO AP The vcredist_x86 exe include all required DLL ﬁle 1 Press the select your test 2i2o 4i4o 4i4o 2 F75111CIO116 F75113CIO116 8i 8o 2 start test select single mode or looptest ...

Page 37: ...ULSE mode Sample to setting GP33 32 31 30 output 1mS low pulse signal this Write_Byte F75111_INTERNAL_ADDR GPIO3X_PULSE_CONTROL 0x00 This is setting low Level output this Write_Byte F75111_INTERNAL_ADDR GPIO3X_PULSE_WIDTH_CONTROL 0x01 This selects the pulse width to 1mS this Write_Byte F75111_INTERNAL_ADDR GPIO3X_CONTROL_MODE 0x0F This is setting the GP33 32 31 30 to output function this Write_Byt...

Page 38: ...T OUT function Set output value void F75111 InterDigitalOutput BYTE byteValue BYTE byteData 0 byteData byteData 0x01 byteValue 0x01 byteValue byteData byteData 0x02 byteValue 0x02 byteValue byteData byteData 0x04 byteValue 0x04 byteValue byteData byteData 0x80 byteValue 0x08 byteValue byteData byteData 0x40 byteValue 0x10 byteValue byteData byteData 0x20 byteValue 0x20 byteValue byteData byteData ...

Page 39: ...ask unuseful value byteGPIO3X byteGPIO3X 0x0F Mask unuseful value byteData byteGPIO1X 0x10 byteData 0x01 byteData byteData byteGPIO1X 0x80 byteData 0x02 byteData byteData byteGPIO1X 0x40 byteData 0x04 byteData byteData byteGPIO3X 0x01 byteData 0x08 byteData byteData byteGPIO3X 0x02 byteData 0x10 byteData byteData byteGPIO3X 0x04 byteData 0x20 byteData byteData byteGPIO3X 0x08 byteData 0x40 byteDat...

Page 40: ...When select Pulse mode 1 ms deﬁne GP1_PSWIDTH_20MS 0x02 When select Pulse mode 20 ms deﬁne GP1_PSWIDTH_100MS 0x03 When select Pulse mode 100 ms deﬁne GPIO2X_PULSE_CONTROL 0x23 GPIO2x Level Pulse Control Register 0 Level Mode 1 Pulse Mode deﬁne GPIO2X_PULSE_WIDTH_CONTROL 0x24 GPIO2x Pulse Width Control Register deﬁne GP2_PSWIDTH_500US 0x00 When select Pulse mode 500 us deﬁne GP2_PSWIDTH_1MS 0x01 Wh...

Page 41: ...wiki index php IO_Device F75111_CIO_Utility_CIO116 3 7 2 IO Device F75111 CIO Utility CIO116 How to use this Demo Application Before executing the program began Please switch to the highest authority continued second F75111 chmod 777 and root 1 Press the select your test 2i2o 4i4o 8i8o CIO1616 2 If you test CIO1616 checkbutton second 75111 3 start button select single mode or looptest ...

Page 42: ...E mode Sample to setting GP33 32 31 30 output 1mS low pulse signal this Write_Byte F75111_INTERNAL_ADDR GPIO3X_PULSE_CONTROL 0x00 This is setting low pulse output this Write_Byte F75111_INTERNAL_ADDR GPIO3X_PULSE_WIDTH_CONTROL 0x01 This selects the pulse width to 1mS this Write_Byte F75111_INTERNAL_ADDR GPIO3X_CONTROL_MODE 0x0F This is setting the GP33 32 31 30 to output function this Write_Byte F...

Page 43: ...T OUT function Set output value void F75111 InterDigitalOutput BYTE byteValue BYTE byteData 0 byteData byteData 0x01 byteValue 0x01 byteValue byteData byteData 0x02 byteValue 0x02 byteValue byteData byteData 0x04 byteValue 0x04 byteValue byteData byteData 0x80 byteValue 0x08 byteValue byteData byteData 0x40 byteValue 0x10 byteValue byteData byteData 0x20 byteValue 0x20 byteValue byteData byteData ...

Page 44: ...ask unuseful value byteGPIO3X byteGPIO3X 0x0F Mask unuseful value byteData byteGPIO1X 0x10 byteData 0x01 byteData byteData byteGPIO1X 0x80 byteData 0x02 byteData byteData byteGPIO1X 0x40 byteData 0x04 byteData byteData byteGPIO3X 0x01 byteData 0x08 byteData byteData byteGPIO3X 0x02 byteData 0x10 byteData byteData byteGPIO3X 0x04 byteData 0x20 byteData byteData byteGPIO3X 0x08 byteData 0x40 byteDat...

Page 45: ...When select Pulse mode 1 ms deﬁne GP1_PSWIDTH_20MS 0x02 When select Pulse mode 20 ms deﬁne GP1_PSWIDTH_100MS 0x03 When select Pulse mode 100 ms deﬁne GPIO2X_PULSE_CONTROL 0x23 GPIO2x Level Pulse Control Register 0 Level Mode 1 Pulse Mode deﬁne GPIO2X_PULSE_WIDTH_CONTROL 0x24 GPIO2x Pulse Width Control Register deﬁne GP2_PSWIDTH_500US 0x00 When select Pulse mode 500 us deﬁne GP2_PSWIDTH_1MS 0x01 Wh...

Page 46: ... 25mm wafer CO1 pin1 PIN NO DESCRIPTION PIN NO DESCRIPTION 1 3 3V 2 GND 3 SMB Clock 4 SMB Data 3 9 CPI1 DC Power input 1x4 pin 2 0mm wafer RED CO1 pin1 PIN NO DESCRIPTION 1 4 GND 2 3 DC IN Note Very important check DC in Voltage ...

Page 47: ...rface PIN NO DESCRIPTION PIN NO DESCRIPTION 1 TMDS DATA2 2 GND 3 TMDS DATA2 4 TMDS DATA1 5 GND 6 TMDS DATA1 7 TMDS DATA0 8 GND 9 TMDS DATA0 10 TMDS CLK 11 GND 12 TMDS CLK 13 NC 14 NC 15 DDC CLOCK 16 DDC DATA 17 GND 18 5V 19 H P Detect HDMI1 HDMI HDMI2 HDMI ...

Page 48: ...nnector option PIN NO DESCRIPTION PIN NO DESCRIPTION 1 Lane0 2 GND 3 Lane0 4 Lane1 5 GND 6 Lane1 7 Lane2 8 GND 9 Lane2 10 Lane3 11 GND 12 Lane3 13 GND 14 GND 15 AUX_CH 16 GND 17 AUX_CH 18 H P Detect 19 GND 20 3 3V DP1 DP DP2 DP ...

Page 49: ...ND 9 Backlight Enable 10 GND 11 PWM dimming 12 GND 13 I2C Clock 14 LCD 5V or 3 3V 15 I2C Data 16 LCD 5V or 3 3V 17 eDP Aux 18 LCD 5V or 3 3V 19 eDP Aux 20 EDP_HPD EDP1 pin1 20 Note 1 eDP interface support 2 lanes 2 JVL1 eDP panel 5V 3 3V default Voltage select 3 eDP1 PIN 9 for panel backlight enable 3 3V Level 4 eDP1 PIN 11 for panel backlight dimming control ...

Page 50: ...46 Follow ISO 7816 2 Smart Card Standard 3 11 SIM1 Nano SIM Card Push Push PIN NO DESCRIPTION PIN NO DESCRIPTION 1 VCC 2 RST 3 CLK 4 NC 5 GND 6 VPP 7 DATA 8 NC SIM1 Nano SIM ...

Page 51: ...D 11 GND B Key notch 20 NC 21 GND 22 NC 23 NC 24 NC 25 NC 26 NC 27 GND 28 NC 29 M2_PERn1 30 NC 31 M2_PERp1 32 NC 33 GND 34 NC 35 M2_PETn1 36 NC 37 M2_PETp1 38 NC 39 GND 40 NC 41 M2_PERn0 SATA RX 42 NC 43 M2_PERp0 SATA RX 44 NC 45 GND 46 NC 47 M2_PETn0 SATA TX 48 NC 49 M2_PETp0 SATA TX 50 PREST 51 GND 52 SRCCLKREQ_N 53 PCIE_CLK_N0 54 NC 55 PCIE_CLK_P0 56 NC 57 GND 58 NC 59 NC 60 NC ...

Page 52: ...ON PIN NO DESCRIPTION 61 NC 62 NC 63 NC 64 NC 65 NC 66 NC 67 NC 68 NC 69 CFG1_SATA_PCIE 70 3 3V 71 GND 72 3 3V 73 GND 74 3 3V 75 NC Note 1 NGFF1 support PCIe x2 SATA SSD Auto detect 2 NGFF1 VCC voltage support 3 3V NGFF1 ...

Page 53: ...D B Key notch 20 NC 21 GND 22 NC 23 NC 24 NC 25 NC 26 W_DISABLE_2 27 GND 28 NC 29 M2_PERn1_U3Rn 30 SIM_RST_M2 31 M2_PERp1_U3Rp 32 SIM_CLK_M2 33 GND 34 SIM_DATA_M2 35 M2_PETn1_U3Tn 36 SIM_PWR_M2 37 M2_PETp1_U3Tp 38 NC 39 GND 40 NC 41 M2_PERn0_MSRp 42 NC 43 M2_PERp0_MSRn 44 NC 45 GND 46 NC 47 M2_PETn0_MSTn 48 NC 49 M2_PETp0_MSTp 50 PREST 51 GND 52 SRCCLKREQ_N 53 PCIE_CLK_N0 54 NC 55 PCIE_CLK_P0 56 N...

Page 54: ... GND 74 3 3V 3 7V 75 CONFIG_2 Note 1 NGFF2 support USB 3 0 PCIe x2 Auto detect 2 VCC voltage default support 3 3V 3 BOM control if need 4G LTE device VCC voltage is 3 7V NGFF2 3 14 CRFP1 Antenna control 1x4 pin 1 25mm wafer OEM PIN NO DESCRIPTION PIN NO DESCRIPTION 1 ANTCTL1 2 ANTCTL2 3 V5 4 GND Note 1 Antenna control by OEM 2 Antenna control with NGFF2 ...

Page 55: ...ty and of ensuring your system performance at best In the BIOS Setup main menu you can see several options We will explain these options in the following pages First let us see the function keys you may use here Press Esc to quit the BIOS Setup Press up down left right to choose the option you want to conﬁrm or modify Press F10 to save these parameters and to exit the BIOS Setup menu after you com...

Page 56: ...e function keys you may use here Press right left to select screen Press up down to choose in the main menu the option you want to conﬁrm or to modify Press Enter to select Press or F5 F6 keys when you want to modify the BIOS parameters for the active option F1 General help F2 Previous values F3 Optimized defaults F4 Save Reset Press Esc to quit the BIOS Setup 4 2 BIOS Menu Screen Function Keys ...

Page 57: ...s Esc 4 4 Menu Bars There are six menu bars on top of BIOS screen Main To change system basic conﬁguration Advanced To change system advanced conﬁguration Chipset To change PCH IO conﬁguration Security Password settings Boot Quiet boot or boot from USB selected Save Exit Save setting loading and exit options User can press the right or left arrow key on the keyboard to switch from menu bar The sel...

Page 58: ...ormation Highlight the item and then use the or and numerical keyboard keys to select the value you want in each item System Date Set the Date Please use Tab to switch between data elements System Time Set the Time Please use Tab to switch between data elements ...

Page 59: ...55 4 6 Advanced Boot Conﬁguration Please refer section 4 6 1 SOC Conﬁg Conﬁguration Please refer section 4 6 2 SIO F81804 Please refer section 4 6 3 NVM Express information Please refer section 4 6 4 ...

Page 60: ...56 4 6 1 Boot Conﬁguration To select Power on state for NumLock default is oﬀ ...

Page 61: ...onﬁg Conﬁguration ACPI Settings Please refer section 4 6 2 1 System Agent SA Conﬁguration Please refer section 4 6 2 2 PCH IO Conﬁguration Please refer section 4 6 2 3 PCH FW Conﬁguration Please refer section 4 6 2 4 ...

Page 62: ...58 4 6 2 1 ACPI Settings ACPI S3 Support To enable BIOS support security device or not default is Enabled ...

Page 63: ...59 4 6 2 2 System Agent SA Conﬁguration ...

Page 64: ...t Boot Display priority there are eDP DDI1 HDMI DDI2 HDMI default is eDP Second Boot Display To select Second Boot Display priority there are DDI1 HDMI DDI2 HDMI default is DDI1 HDMI Third Boot Display To select First Boot Display priority there is DDI2 HDMI ...

Page 65: ...61 4 6 2 3 PCH IO Conﬁguration PCI Express Conﬁguration Please refer section 4 6 2 3 1 SATA Conﬁguration Please refer section 4 6 2 3 2 ...

Page 66: ...62 4 6 2 3 1 PCI Express Conﬁguration ...

Page 67: ...63 To select NGFF1 device enabled or not and to change the PCIe Speed there are Auto Gen1 Gen2 Gen3 default is Auto ...

Page 68: ...64 To select NGFF1 M 2 SATA device enabled or not 4 6 2 3 2 SATA Conﬁguration ...

Page 69: ...65 4 6 2 4 PCH FW Conﬁguration ...

Page 70: ...O F81804 UART Port 1 Conﬁguration Please refer section 4 6 3 1 UART Port 2 Conﬁguration Please refer section 4 6 3 2 Hardware Monitor Please refer section 4 6 3 3 Restore on Power Loss Please refer section 4 6 3 4 ...

Page 71: ...67 4 6 3 1 UART Port 1 Conﬁguration To Enable Serial port or not default is Enabled ...

Page 72: ...68 Base I O Address default is 3F8h ...

Page 73: ...69 Interrupt default is IRQ4 ...

Page 74: ...70 Peripheral to select the Serial port to RS232 RS422 RS485 default is RS232 ...

Page 75: ...71 4 6 3 2 UART Port 2 Conﬁguration To Enable Serial port or not default is Enabled ...

Page 76: ...72 Base I O Address default is 2F8h ...

Page 77: ...73 Interrupt default is IRQ3 ...

Page 78: ...74 Peripheral to select the Serial port to RS232 RS422 RS485 default is RS232 ...

Page 79: ...75 4 6 3 3 Hardware Monitor Press Enter to view PC health status This section shows the status of your CPU Fan and overall system This is only available when there is Hardware Monitor function onboard ...

Page 80: ...76 4 6 3 4 Restore On Power Loss To select the power behavior after power fail default is last state ...

Page 81: ...77 4 6 4 NVM Express Information Press Enter to view the NVMe storage devices information ...

Page 82: ...78 4 7 Security TrEE Protocol Version There are 1 0 and 1 1 versions TPM Availability To select TPM available or hidden TPM Operation ...

Page 83: ...79 To select TPM operations ...

Page 84: ...80 Set Supervisor Password To set up an Supervisor password ...

Page 85: ...r Wake On LAN1 To select S3 S5 or S3 S5 wake on LAN1 default is Disabled Wake On USB To select S3 wake on USB default is Disabled Wake On RTC The optional settings are Disabled default By every day By day of month ...

Page 86: ...82 4 9 Boot Quiet Boot The optional settings are Enabled default Disabled Network Stack The optional settings are Enabled Disabled default ...

Page 87: ...83 4 10 Save Exit Exit Saving Changes Save conﬁguration and reset Exit Discarding Changes Reset without saving the changes Load Optimal Defaults To restore the optimal default for all the setup options ...

Page 88: ...lease enter your motherboard s name Insert your bootable disc into X X could be C A or others It depends on which type of storage device you use Start the computer and type X H2OFFT D EXE 2I640DWA2 ROM BIOS ALL 2I640DWA2 ROM is the ﬁle name of the latest BIOS It may be 2I640DWA1 ROM or 2I640DWA2 ROM etc Please leave one space between ROM BIOS ALL By Bay Trail series mainboard please type X H2OFFT ...

Page 89: ...6bit 32bit 1280 x 720 x 256 16bit 32bit 1280 x 768 x 256 16bit 32bit 1280 x 800 x 256 16bit 32bit 1280 x 960 x 256 16bit 32bit 1280 x 1024 x 256 16bit 32bit 1400 x 1050 x 256 16bit 32bit 1440 x 900 x 256 16bit 32bit 1600 x 900 x 256 16bit 32bit 1600 x 1200 x 256 16bit 32bit 1680 x 1050 x 256 16bit 32bit 1920 x 1080 x 256 16bit 32bit 1920 x 1200 x 256 16bit 32bit ...

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