MMDSP Debugger
10
©1989-2019 Lauterbach GmbH
On-chip Breakpoints
This implementation is called on-chip, because the debugger uses resources provided by the processor to
set a breakpoint. The MMDSP core is equipped with 2 watchpoint/breakpoint units.
The following list gives an overview of the usage of the on-chip breakpoints by TRACE32-ICD:
•
On-chip breakpoints:
Total amount of available on-chip breakpoints.
•
Instruction breakpoints:
Number of on-chip breakpoints that can be used for program
breakpoints.
•
Read/Write breakpoints:
Number of on-chip breakpoints that can be used as Read or Write
breakpoints.
•
Data breakpoints:
Number of on-chip data breakpoints that can be used to stop the program
when a specific data value is written to an address or when a specific data value is read from an
address.
On-chip Breakpoints on instructions
On-chip breakpoints are handled by the CPU internally and do not require to modify the program memory.
Therefore they can be used to set a breakpoint on an instruction in FLASH or ROM.
With the command
<range>
it is possible to instruct the debugger to use On-chip
breakpoints for the specified range as default (it is still possible to override this with parameters like /SOFT
for the break.set command). Typically it is used for FLASH/ROM memories. If a breakpoint is set within the
specified address range, the debugger uses automatically the available on-chip breakpoints.
Use the command
to see for which address ranges the debugger uses on-chip breakpoints.
CPU Family
On-chip
Breakpoints
Instruction
Breakpoints
Read/Write
Breakpoints
Data
Breakpoints
MMDSP
3
2
1
1