C6000 Debugger | 45
©
1989-2022
Lauterbach
SYStem.JtagClock
Define the frequency of the debug port
Default frequency: 10 MHz.
Selects the frequency (TCK/SWCLK) used by the debugger to communicate with the processor in JTAG,
SWD or cJTAG mode. The frequency affects e.g. the download speed. It could be required to reduce the
JTAG frequency if there are buffers, additional loads or high capacities on the debug port signals or if VTREF
is very low. A very high frequency will not work on all systems and will result in an erroneous data transfer.
Therefore we recommend to use the default setting if possible.
Format:
SYStem.JtagClock
[<
frequency
> |
RTCK
|
ARTCK
<
frequency
> |
CTCK
<
frequency
> |
CRTCK
<
frequency
>]
SYStem.BdmClock
(deprecated)
<frequency>
:
4 kHz
…
100 MHz
<frequency>
•
The debugger cannot select all frequencies accurately. It chooses
the next possible frequency and displays the real value in the
SYStem.state
window.
•
Besides a decimal number like “100000.” short forms like “10kHz”
or “15MHz” can also be used. The short forms imply a decimal
value, although no “.” is used.
RTCK
The debug clock is controlled by the RTCK signal (
R
eturned
TCK
).
On some processor derivatives (e.g. ARMxxxE-S) there is the need to
synchronize the processor clock and the JTAG clock. In this case RTCK shall
be selected. Synchronization is maintained, because the debugger does not
progress to the next TCK/SWCLK edge until after an RTCK edge is
received.
In case you have a processor derivative requiring a synchronization of the
processor clock and the debug clock, but your target does not provide an
RTCK signal, you need to select a fix debug clock below 1/6 of the processor
clock (ARM7, ARM9), below 1/8 of the processor clock (ARM11),
respectively.
When RTCK is selected, the frequency depends on the processor clock and
on the propagation delays. The maximum reachable frequency is about
16 MHz.
SYStem.JtagClock RTCK