CrossLink-NX PCIe Bridge Board Basic Demo
User Guide
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FPGA-UG-02145-1.0
7.
Troubleshooting
7.1.
SPI Flash Update
If you are getting a verification error while dumping the .bit file, try changing the TCK frequency to a value greater
than 4. The TCK Divider Setting option is in the Cable Setup dialog box of the Lattice Radiant Programmer Window,
as shown in
. Restart programming by clicking the Program button.
Figure 7.1. TCK Frequency Setting
If the verification error problem still occurs, press and hold the PROGRAMN push button on the board before
clicking the Program button.
If the device is not getting detected on port FTUSB-0. Click Detect cable and select the port FTUSB-1.
Figure 7.2. Port Selection
