12
POWR607/6AT6 Evaluation Board
Figure 4. POWR607/6AT6 Evaluation Board Block Diagram
Table 2 describes the components on the board and the interfaces it supports.
Table 2. POWR607/6AT6 Evaluation Board Components and Interfaces
Component/Interface
Type
Schematic Reference
Description
Circuits
Pulse Stretch Circuit
Circuit
Q4, D10, D11
Stretch watchdog interrupt pulse outputs to
40ms.
USB Controller
Circuit
U8:FT2232H
USB-to-JTAG interface.
USB Mini B Socket
I/O
J1:USB_MINI_B
Programming and debug interface.
Components
Power Manager II
Mixed Signal IC
U3: ispPAC-POWR6AT6
Voltage monitor, margin, trim.
Power Manager II
Mixed Signal IC
U1:ispPAC-POWR607
Mixed Signal Device.
Interfaces
8x1 Header Landing
I/O
J2:I2C
I
2
C interface.
8x1 Header Landing
I/O
J3:JTAG Interface
JTAG interface.
14x2 Header
I/O
J4:HEADER 14X2
User-definable I/O.
5 LEDs
Output
D7-D0
User-definable LEDs, I/O1 to I/O5.
DIP Switch
I/O
SW1A, B, C, and D
4-bit DIP switch.
Push-button Switches
I/O
SW2:Reset, SW3:WD_Trigger
General-purpose push buttons.
Slide Potentiometer
I/O
R16
Potentiometer tied to 3.3 V rail. Emulates
brown-out 2.5 V conditions at VMON2 inputs
of POWR607 and POWR6AT6.
3.3V
Slide
VMON1
IO_[1:5]
5
5 LEDs
2.5V Potentiometer
1.8V
VMON2
IO_2
Pulse Stretch
Circuit
LED D11
DIP Switch
SW1A
VMON3
VMON [4:6] 4
VMON [1:6]
6
VMON_GS[4:6]
3
24
Header 14x2
A/Mini-B
DIP Switch
SW1B,C,D
Pushbutton
Switch SW2
Pushbutton
Switch SW3
JTAG
Header
IO_[3:5]
3
IN1
IN2
Power Manager II
POWR607
ispPAC-
POWR607-01SN24I
TRIM_[4:6]
3
IO_[1:5]
5
IN_[1:2]
2
VRAIL[4:6]
3
HVOUT[1:2]
2
USB Cable
USB Mini B
Socket
USB
Controller
I2C 2
VMON
6
TRIM_[4:6] 3
VMON_GS 3
JTAG
Power Manager II
POWR6AT6
ispPAC-
POWR6AT6-01SN32I
I2C
2
I2C
Header
