Lattice Semiconductor mVision AR0234, User Manual

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Lattice mVision AR0234 Sensor Board
User Guide
© 2021-2022 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal .
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
16 FPGA-UG-02124-1.1
6.3. Operating Current Consumption for MIPI Output
Table 6.3. Operating Current Consumption for MIPI Output
Symbol Parameter Condition Min Typ Max Unit
I
DD
_PHY +
I
DD
_DATA +
I
DD
Digital Operating Current MIPI, Streaming, Full Resolution 120 fps TBD 147 TBD mA
I
DD
I
DD
_IO
I/O Digital Operating
Current
MIPI, Streaming, Full Resolution 120 fps TBD 8 —
mA
I
AA
_PHY + T
AA
Analog Operating Current MIPI, Streaming, Full Resolution 120 fps TBD 55
TBD mA
I
AA
_PIX Pixel Supply Current MIPI, Streaming, Full Resolution 120 fps TBD 6
TBD mA
Notes:
1.
(V
AA
= V
AA
_PIX = V
DD
_IO = 2.8 V; V
DD
= V
DD
_PHY = 1.2 V; V
DDIO
_PHY = 1.8 V; PLL Enabled and PIXCLK = 90 MHz; T
A
= 25 °C;
C
LOAD
= 10 pF)
2. Values in Table 6.3 are subject to change.
3. The following supply rails can be connected together:
a.
V
DD
, V
DD
_PHY, and V
DD
_DATA
b. V
DD
_IO and V
DD
IO_PHY
c. V
AA
, V
AA
_PHY, and V
AA
_PIX
6.4. Standby Current Consumption
Table 6.4. Standby Current Consumption
Definition Condition Min Typ Max Unit
Apply XSHUTDOWN (Clock Off)
Analog, 2.8 V TBD 10 TBD µA
Digital, 1.8 V TBD 40 TBD µA
Apply XSHUTDOWN (Clock On)
Analog, 2.8 V TBD 25 TBD µA
Digital, 1.8 V TBD 55 TBD µA
Soft Standby (Clock Off, Driven Low)
Analog, 2.8 V TBD 15 TBD µA
Digital, 1.8 V TBD 270 TBD µA
Soft Standby (Clock On, EXTCLK = 27 MHz)
Analog, 2.8 V TBD 70 TBD µA
Digital, 1.8 V TBD 2600 TBD µA
Notes:
1.
(Analog = V
AA
+ V
AA
_PIX + V
AA
_PHY; Digital = V
DD +
V
DD
_IO + V
DD
_PHY + V
DDIO
_PHY + V
DD
_DATA; T
A
= 25 °C)
2. Values in Table 6.4 are subject to change.
6.5. Two-Wire Serial Bus Timing Parameters
Unless otherwise stated, the following specifications apply to the following conditions:

V
DD
= V
DD
_PHY = V
DD
_DATA = 1.2 V +/-0.06;

V
DD
_IO = V
AA
= V
AA
_PIX = 2.8 V +/-0.3 V; V
DDIO
_PHY = 1.8 V +/-0.1 V

T
A
= −40 °C to + 105 °C;

Output Load = 10 pF;

PIXCLK Frequency = 90 MHz;

MIPI off
The electrical characteristics of the two−wire serial register interface (S
CLK
, S
DATA
) are shown in Figure 6.1 and Table 6.5 .