Lattice Semiconductor MachXO5-NX Development Kit, User Manual

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MachXO5-NX Development Board
Preliminary Evaluation Board User Guide
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28 FPGA-EB-02052-0.90
J15 Pin Number Net Name MachXO5-25 Ball Location
10 PMOD0_8 H9
11 GND —
12 VCCIO0 —
Table 8.12. J16 Header Pin Connections
J16 Pin Number Net Name MachXO5-25 Ball Location
1 PMOD1_1 E11
2 PMOD1_2 D13
3 PMOD1_3 D15
4 PMOD1_4 C16
5 GND —
6 VCCIO1 —
7 PMOD1_5 D11
8 PMOD1_6 C13
9 PMOD1_7 C15
10 PMOD1_8 D16
11 GND —
12 VCCIO1 —
8.7. MIPI Camera Header
The MachXO5-NX Development Board support MIPI Camera sensor input with soft D-PHY. Figure 8.1 shows the block
diagram of the MIPI Camera Sensor interface on the board. The data path interface between the camera sensor
module and MachXO5-25 is CSI-2. The cameras are configured from the MachXO5-25 device through the MIPI Sensor
Control interface including I
2
C, frame sync, and reset signals drive the camera.
MachXO5-NX
(U3)
MIPI Sensor Data
x4
MIPI Sensor Control
30-Pin MIPI Sensor
Input Header
(J27)
MIPI Sensor Clock
x1
Figure 8.1. MIPI Camera Sensor Interface
MachXO5-NX Development Board supports a 30-pin Kyocera header footprint of 24580403 for MIPI Camera
sensor input.
Table 8.13 show the signal assignment for the MIPI Camera sensor input Header of J27. Use J24 as
described in Figure 8.2 to select Camera CVDD power for Pin 25 of J8.
Table 8.13. MIPI Camera Sensor Interconnections
MIPI Camera Sensor Input Header
(J8) Pin Number
Net Name MachXO5-25 Ball Location
1 NC —
2 DPHY0_CKN R14