Lattice Semiconductor MachXO3, User Manual

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27
MachXO3 Starter Kit User Guide
Figure 15. Power Decoupling and LEDs
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
LEDs
LAYOUT LEDs IN A SINGLE ROW
PLACE DECOUPLING CAPACITORS CLOSE TO THE U5 POWER PINS
Note : LEDs are controlled by XO3L I/O Bank 1. When VCCIO1 is set to a voltage less than 3.3V, observe all I/O overdrive requirements. Refer to Lattice TN1280 "MachXO3 sysIO Usage Guide" for more information.
VCC_CORE
VCC_CORE
+3.3V
LED0
Sheet[5]
LED1
Sheet[5]
LED2
Sheet[5]
LED3
Sheet[5]
LED4
Sheet[5]
LED5
Sheet[5]
LED6
Sheet[5]
LED7
Sheet[5]
Date: Size
Schematic Rev
of
Sheet
Title
Lattice Semiconductor Applications
Email: techsupport@Latticesemi.com
Phone (503) 268-8001 -or- (800) LATTICE
Board Rev
Project
12-SEP-14
B
1.0
8
8
POWER DECOUPLING AND LED'S
MACHXO3 Starter Kit - LCMXO3-6900C
A
Date: Size
of
Sheet
Title
Project
12-SEP-14
B
1.0
8
8
A
Date: Size
of
Sheet
Title
Project
12-SEP-14
B
1.0
8
8
A
C53 0.1uF
D5 Red
1 2
R75 1K
C60 0.01uF
C57 0.01uF
1K-2K/4K/7K
LCMXO3L-6900C-5BG256C U5G
GND/GND/GND
B2
GND/GND/GND
B15
GND/GND/GND
C3
GND/GND/GND
C14
GND/GND/GND
D4
GND/GND/GND
D13
GND/GND/GND
E5
GND/GND/GND
E12
GND/GND/GND
F6
GND/GND/GND
F11
GND/GND/GND
H8
GND/GND/GND
H9
GND/GND/GND
J8
GND/GND/GND
J9
GND/GND/GND
L6
GND/GND/GND
L11
GND/GND/GND
M5
GND/GND/GND
M12
GND/GND/GND
N4
GND/GND/GND
N13
GND/GND/GND
P3
GND/GND/GND
P14
GND/GND/GND
R2
GND/GND/GND
R15
NC/NC/NC
A2
VCC/VCC/VCC
T16
VCC/VCC/VCC
T1
VCC/VCC/VCC
K10
VCC/VCC/VCC
K7
VCC/VCC/VCC
G10
VCC/VCC/VCC
G7
VCC/VCC/VCC
A16
VCC/VCC/VCC
A1
C54 0.1uF
D6 Red
1 2
R73 1K
C58 0.1uF
C55 0.1uF
R78 1K
D7 Red
1 2
C59 0.1uF
C56 0.1uF
D8 Red
1 2
R72 1K
R76 1K
D2 Red
1 2
R74 1K
C52 1uF
D3 Red
1 2
R79 1K D9 Red
1 2
D4 Red
1 2
R77 1K
C51 10uF